The temporal logic scheduler design pattern allows
you to schedule Simulink® subsystems to execute at specified times. The model
sf_temporal_logic_scheduler illustrates this design
The Temporal Logic Scheduler chart contains the following logic:
The Temporal Logic Scheduler chart contains two states that schedule the execution
of the function-call subsystems
A3 at different rates, as determined by the temporal logic
every (see Operators for Event-Based Temporal Logic).
In the FastScheduler state, the
every operator schedules
function calls as follows:
A1 every time the function-call output event
call wakes up the chart
A2 at half the base rate
A3 at one-quarter the base rate
The SlowScheduler state schedules function calls less frequently — at 8,
16, and 32 times slower than the base rate. The chart switches between fast and slow
executions after every 100 invocations of the
To run the
sf_temporal_logic_scheduler model, follow these
Open the model by clicking sf_temporal_logic_scheduler or typing
sf_temporal_logic_scheduler at the MATLAB® command prompt.
Open the Scope block.
After the simulation ends, click the Autoscale button in the Scope block.
The scope illustrates the different rates of execution.