Documentation

PicoZed SDR Receiver

(To be removed) Receive data from PicoZed SDR hardware

The PicoZed™ SDR product has been renamed to ADI RF SOM. Starting in R2018a, the name 'PicoZed SDR' will no longer work in function calls, and the PicoZed SDR library will be removed from Simulink®. As of R2017b, use the name 'ADI RF SOM' in function calls, and use the new ADI RF SOM features for all PicoZed SDR products supported in previous releases. See PicoZed SDR (Before R2017b).

  • Library:
  • Communications System Toolbox Support Package for Xilinx Zynq Based Radio / PicoZed SDR

Description

The PicoZed SDR Receiver block receives data from the PicoZed SDR hardware. This connection enables you to simulate and develop various software-defined radio (SDR) applications.

The following diagram shows the conceptual overview of transmitting and receiving radio signals with this support package. Simulink interacts with the PicoZed SDR Receiver block to receive signals from the PicoZed SDR hardware.

When the host is not connected to the radio hardware, you can still use the block to develop a model that propagates sample time and data type information. To propagate this information, you must update your model.

To check connectivity between the receiver block and the radio hardware, and to synchronize radio settings between them, on the Main tab of the block, click Info.

Channel Output

The PicoZed SDR Receiver block supports up to two channels to receive data from the PicoZed SDR hardware. Use the Channel Mapping parameter to indicate whether to use a single channel or both channels. The block outputs a matrix signal, data, where each column corresponds to one channel of data of length data length. For each channel, you can set the gain independently, or you can apply the same setting to both channels. All other parameter values are applied to both channels.

Design Custom Filter

You can use the ADI filter wizard to change the default filter design applied to the filter chain in the PicoZed SDR Receiver block. To open the filter wizard, on the Advanced tab of the block, click Design custom filter. The wizard enables you to design a custom filter for the Analog Devices® AD9361/AD9364 RF chip based on the Baseband sample rate (Hz) parameter. You can adjust and optimize the settings for calculating the analog filters, the interpolation and decimation filters, and the FIR coefficients. When you finish with the wizard, to apply the filter settings, click Apply on the block.

The ADI filter wizard requires the following MathWorks® products:

  • MATLAB®

  • Signal Processing Toolbox™

  • DSP System Toolbox™

For instructions on operating the ADI filter wizard, visit the Analog Devices website at MATLAB Filter Design Wizard for AD9361.

For more information, see Baseband Sampling Rate and Filter Chains.

Ports

Input

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External RF center frequency source, specified as a nonnegative finite scalar on the port. The valid center frequency range is 70 MHz to 6 GHz.

Dependencies

To enable this port, set Source of Center frequency to Input port.

Data Types: double

External gain source, specified as a scalar or 1-by-2 vector on the port. The valid gain range is –4 dB to 71 dB and depends on the center frequency. An incompatible gain and center frequency combination returns an error from the radio hardware.

Set the gain value based on the Channel Mapping configuration:

  • For a single channel, specify the gain as a scalar.

  • For two channels that use the same gain value, specify the gain as a scalar. The block applies the gain by scalar expansion.

  • For two channels that use different gain values, specify the values as a 1-by-2 vector. The Nth element of the vector is applied to the Nth channel specified by Channel Mapping.

Dependencies

To enable this port, set Source of gain to Input port.

Data Types: double

Output

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Output signal received from the radio hardware, returned as a complex matrix. The number of columns in the matrix depends on the number of channels in use, as specified by the Channel Mapping parameter. Each column corresponds to a channel of complex data received on one channel.

This port supports complex values with the following data types:

  • 16-bit signed integers — The complex values are the raw 16-bit I and Q samples from the board. The AD9361/AD9364 RF chip has a 12-bit ADC, so only the 12 most significant bits of the data are used.

  • Single-precision floating point — The complex values are scaled to the range of [–1, 1].

  • Double-precision floating point — The complex values are scaled to the range of [–1, 1].

To specify the base type, use the Output data type parameter.

When the block is activated during simulation, the host might not receive any data from the radio hardware. To determine whether data is valid, check the data length port and enable the lost samples port. The first valid data frame can contain transient values, resulting in packets containing undefined data.

Data Types: int16 | single | double
Complex Number Support: Yes

Actual length of the data received from the radio hardware, returned as a nonnegative integer. When this port contains a zero value, the received data is not valid. When this port contains a positive value, use the data length port and an enabled subsystem driven by the data length signal to qualify the execution of the model.

Data Types: double

Data discontinuity flag, returned as a logical scalar.

  • 0 indicates no overflow or underflow.

  • 1 indicates the presence of overflow or underflow.

This port is a useful diagnostic tool to determine real-time operation of the PicoZed SDR Receiver block. If your model is not running in real time, you can decrease the baseband sampling rate to approach or achieve real-time performance.

Dependencies

To enable this port, on the Main tab, select Enable output port for Lost samples indicator.

Data Types: Boolean

Parameters

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When you set block parameter values, the PicoZed SDR Receiver block first checks that the values have the correct data types. If the values pass those checks, the values can still be out of range for the radio hardware. In that case, the radio hardware sets the actual value as close to the specified value as possible. When you next synchronize the block with the radio hardware by clicking Info, a dialog box displays the actual values.

If a parameter is listed as tunable, then you can change its value during simulation.

Main Tab

IP address of the radio hardware, specified as a dotted-quad expression.

This parameter must match the physical IP address of the radio hardware assigned during hardware setup. See Guided Host-Radio Hardware Setup. If you configure the radio hardware with an IP address other than the default, update Radio IP address accordingly.

  • Dialog — Set the center frequency by using the Center frequency (Hz) parameter.

  • Input port — Set the center frequency by using the center frequency input port.

RF center frequency in Hz, specified as a nonnegative finite scalar. The valid range for center frequency is 70 MHz to 6 GHz.

Tunable: Yes

Dependencies

To enable this parameter, set the Source of Center frequency to Dialog.

Data Types: double

  • AGC Slow Attack — Use for signals with slowly changing power levels.

  • AGC Fast Attack — Use for signals with rapidly changing power levels.

  • Dialog — Specify the gain by using the Gain (dB) parameter.

  • Input port — Specify the gain by using the gain input port.

Gain in dB, specified as a scalar or a 1-by-2 vector. The valid gain range is –4 dB to 71 dB and depends on the center frequency. An incompatible gain and center frequency combination returns an error from the radio hardware.

Set the gain value based on the Channel Mapping configuration:

  • For a single channel, specify the gain as a scalar.

  • For two channels that use the same gain value, specify the gain as a scalar. The block applies the gain by scalar expansion.

  • For two channels that use different gain values, specify the values as a 1-by-2 vector. The Nth element of the vector is applied to the Nth channel specified by Channel Mapping.

Tunable: Yes

Dependencies

To enable this parameter, set Source of gain to Dialog.

Data Types: double

Channel output mapping, specified as a scalar or a 1-by-2 vector:

  • 1 — Only channel 1 is in use.

  • 2 — Only channel 2 is in use.

  • [1 2] — Both channels are in use.

Baseband sampling rate in Hz, specified as a positive scalar. The valid range of this parameter is 520.841 kHz to 61.44 MHz.

Note

To synchronize the block with the radio hardware, click Info on the block. If the specified and actual rates have a small mismatch, verify that the computed rate is close enough to what you actually want.

Data Types: double

When you select this parameter, the PicoZed SDR Receiver block produces a set of contiguous frames. This setting can help simulate models that cannot run in real time. When you enable burst mode, specify the amount of contiguous data by using the Number of frames in burst parameter. For more information on how to use this parameter, see Burst Mode.

Number of frames in a contiguous burst, specified as a strictly positive integer.

Dependencies

To enable this parameter, select Enable burst mode.

  • int16 — Indicates that the complex values are the raw 16-bit I and Q samples from the board. The AD9361/AD9364 RF chip has a 12-bit ADC, so only the 12 most significant bits of the data are used.

  • single — Indicates single-precision floating point values scaled to the range of [–1, 1].

  • double — Indicates double-precision floating point values scaled to the range of [–1, 1].

Number of samples per frame, specified as a strictly positive integer. Using values less than 3660 can yield poor performance.

Select this parameter to enable the lost samples output port during host-radio hardware data transfers.

  • Code generation — Simulation starts up slower but runs faster.

  • Interpreted execution — Simulation starts up faster but runs slower.

Advanced Tab

When you select this parameter, the block applies IQ imbalance compensation.

When you select this parameter, the block applies an RF DC blocking filter.

When you select this parameter, the block applies a baseband DC blocking filter.

When you select this parameter, the radio hardware data path bypasses the algorithm generated and programmed during the FPGA Targeting Workflow or the Hardware-Software Co-Design Workflow.

When you select this parameter, the block displays advanced internal radio properties. Do not edit these settings.

Introduced in R2015b

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