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Creating a test harness and importing test cases from a Simulink® Design Verifier data file

This example shows how to programmatically import test cases from a Simulink Design Verifier data file into an existing SystemTest™ TEST-file.

This example requires the following products to run:

  • Simulink

  • Stateflow®

Simulink Model Overview

The Simulink model is a modified version of the fuel rate controller with one root-level Inport block using a bus object, where each signal in the bus represents:

  • Throttle angle

  • Speed

  • Exhaust gas (EGO)

  • Manifold absolute pressure (MAP)

demosystest_fuelctrl_bus_model

Part 1: Read data from a Simulink® Design Verifier™ data file

For this example, import a test case from a Simulink Design Verifier data file. When the root level inport of a model uses a bus, the Simulink Design Verifier data file structure contains input port field analysis information. The "InputPortInfo" field of AnalysisInformation structure provides the bus information.

% Load the test cases from the Design Verifier data file
load('st_fuelctrl_sldvdata.mat')

individualSignalInfo = sldvData.AnalysisInformation.InputPortInfo{1}(2:end);

% Get the signal time and data
testCaseTime = sldvData.TestCases(1).timeValues;
testCaseData = sldvData.TestCases(1).dataValues{1};

Part 2: Create a SystemTest test case object

Next, create a test case object and provide a name and description for the test case. This name is useful for identifying the test case in the Test Case Editor, the test results object, and in the test execution report.

testCaseName = 'Design Verifier "Test Case 1"';
sldvTestCase = systest.TestCase(testCaseName);

% Update the Test Case Description
sldvTestCase.Properties.Description = Sldv.DataUtils.getTestcaseDesc(sldvData,1);

Look at the resulting test case object.

sldvTestCase
sldvTestCase = 

  systest.TestCase 

   Properties:
               Name: 'Design Verifier "Test Case 1"'
           Duration: 0 seconds
       DurationMode: 'LongestSignal'

   Signal Names:   

   Description: 

    Test Case 1 (5 Objectives)
    	Parameter values:
    
    	1. control logic.Speed."[speed==0 & press < zero_th..." - Transition: Transition trigger expression T @ T=0.01
    	2. control logic.Fail.Multi - State: Substate executed State "Three" @ T=0.01
    	3. control logic.Fail.Multi."INC" - Transition: Transition trigger expression F @ T=0.01
    	4. control logic.Fail.Multi."DEC" - Transition: Transition trigger expression F @ T=0.01
    	5. control logic.Fail.Multi."INC" - Transition: Transition trigger expression T @ T=0.01

  <a href="matlab:methods('systest.TestCase')">Methods</a>

Part 3: Create a signal object for each signal in the Simulink® Design Verifier™ data file

Next, create a signal object for each test signal in the data file. Each signal object is added to the test case object.

    for signalIdx = 1:length(individualSignalInfo)

        % Extract the time and data for each signal
        timeValues = testCaseTime;
        dataValues = testCaseData{signalIdx};

        % Create a signal with custom segment
        signal = systest.signals.Signal('Custom', {'Time', timeValues, 'Data', dataValues});

        % Get the signal name
        signalFullName  = individualSignalInfo{signalIdx}.SignalLabels;

        % Assign the bus signal to the test case
        sldvTestCase.(signalFullName) = signal;
    end
Looking at the test case object, you can now see that "input_bus" has been
added to the test case object and appears under Parameter Name.
sldvTestCase
sldvTestCase = 

  systest.TestCase 

   Properties:
               Name: 'Design Verifier "Test Case 1"'
           Duration: 0.01 seconds
       DurationMode: 'LongestSignal'

   Signal Names:   
      input_bus: [1x1 struct]

   Description: 

    Test Case 1 (5 Objectives)
    	Parameter values:
    
    	1. control logic.Speed."[speed==0 & press < zero_th..." - Transition: Transition trigger expression T @ T=0.01
    	2. control logic.Fail.Multi - State: Substate executed State "Three" @ T=0.01
    	3. control logic.Fail.Multi."INC" - Transition: Transition trigger expression F @ T=0.01
    	4. control logic.Fail.Multi."DEC" - Transition: Transition trigger expression F @ T=0.01
    	5. control logic.Fail.Multi."INC" - Transition: Transition trigger expression T @ T=0.01

  <a href="matlab:methods('systest.TestCase')">Methods</a>

Step 4: Create a SystemTest TEST-File and add the test case to it.

You can automatically generate a preconfigured SystemTest Test-File for our model from the MATLAB command line. For more information, see the example Creating test harness for a model using buses at the root-level inports

testFileName = 'demosystest_fuelctrl_harness.test';
modelName = 'demosystest_fuelctrl_bus_model.mdl';
systest.createHarness(testFileName, modelName);

Now you are ready to append the test case to the TEST-file.

% Load existing test cases from the TEST-file
testCases = stLoadTestCases(testFileName);

% Append the test case
testCases = [testCases sldvTestCase];

% Save the test cases to the TEST-file
stSaveTestCases(testFileName,testCases);
The appended test cases will be run in the second iteration of the test.
testCases
testCases = 

    A [1x2 systest.TestCase] array 

    SignalNames: input_bus.throttle, input_bus.engineSpeed, input_bus.EGO, input_bus.MAP

    Name                               Duration      DurationMode       
    --------------------------------------------------------------------
    TestCase1                          10            LongestSignal      
    Design Verifier "Test Case 1"      0.01          LongestSignal      
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