|
|
|
| R2012a Documentation → Embedded Coder | |
Learn more about Embedded Coder |
|
| Contents | Index |
Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C2000/ C2802x
Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C2000/ C2803x
Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C2000/ C280x
Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C2000/ C28x3x
Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C2000/ C2834x
The SPI Receive block supports synchronous, serial peripheral input/output port communications between the DSP controller and external peripherals or other controllers. The block can run in either slave or master mode.
In master mode, the SPISIMO pin transmits data and the SPISOMI pin receives data. When master mode is selected, the SPI initiates the data transfer by sending a serial clock signal (SPICLK), which is used for the entire serial communications link. Data transfers are synchronized to this SPICLK, which enables both master and slave to send and receive data simultaneously. The maximum for the clock is one quarter of the DSP controller's clock frequency.
For any given model, you can have only one SPI Receive block per module. There are two modules, A and B, which can be configured through the Target Preferences block.
Note Many SPI-specific settings are in the DSPBoard section of the Target Preferences block. You should verify that these settings are correct for your application. |
Select the SPI module to be used for communications. Each processor has a different number of modules.
Specify how many uint16s are expected to be received. Select 1 through 16.
Set the value the SPI node outputs to the model before it has received any data.
The default value is 0.
If this option is selected, system waits until data is received before continuing processing.
When this field is checked, the SPI Receive block adds another output port for the transaction status, and appears as shown in the following figure.
Error status may be one of the following values:
0: No errors
1: Data loss occurred, (Overrun: when FIFO disabled, Overflow when FIFO enabled)
2: Data not ready, a time out occurred while the block was waiting to receive data
Check this check box to post an asynchronous interrupt when data is received.
Sample time, Ts, for the block's input sampling. To execute this block asynchronously, set Sample Time to -1, check the Post interrupt when message is received box, and refer to Asynchronous Interrupt Processing for a discussion of block placement and other necessary settings.
C280x/C2802x/C2803x/C28x3x/c2834x SPI Transmit
C280x/C2802x/C2803x/C28x3x Hardware Interrupt
Learn more about Simulink through this collection of videos, articles, technical literature and the Getting Started with Simulink Guide.
| © 1984-2012- The MathWorks, Inc. - Site Help - Patents - Trademarks - Privacy Policy - Preventing Piracy - RSS |
