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Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C2000/ C280x
Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C2000/ C28x3x
The ADC block configures the ADC to perform analog-to-digital conversion of signals connected to the selected ADC input pins. The ADC block outputs digital values representing the analog input signal and stores the converted values in the result register of your digital signal processor. You use this block to capture and digitize analog signals from external sources such as signal generators, frequency generators, or audio devices. With the C28x3x, you can configure the ADC to use the processor's DMA module to move data directly to memory without using the CPU. This frees the CPU to perform other tasks and increases overall system performance.
The output of the ADC is a vector of uint16 values. The output values are in the range 0 to 4095 because the ADC is 12-bit converter.
The ADC block supports ADC operation in dual and cascaded modes. In dual mode, either module A or module B can be used for the ADC block, and two ADC blocks are allowed in the model. In cascaded mode, both module A and module B are used for a single ADC block.
Specifies which DSP module to use:
A — Displays the ADC channels in module A (ADCINA0 through ADCINA7).
B — Displays the ADC channels in module B (ADCINB0 through ADCINB7).
A and B — Displays the ADC channels in both modules A and B (ADCINA0 through ADCINA7 and ADCINB0 through ADCINB7).
Type of sampling to use for the signals:
Sequential — Samples the selected channels sequentially.
Simultaneous — Samples the corresponding channels of modules A and B at the same time.
Type of signal that triggers conversions to begin:
Software — Signal from software. Conversion values are updated at each sample time.
ePWMxA / ePWMxB / ePWMxA_ePWMxB — Start of conversion is controlled by user-defined PWM events.
XINT2_ADCSOC — Start of conversion is controlled by the XINT2_ADCSOC external signal pin.
The choices available in Start of conversion depend on the Module setting. The following table summarizes the available choices. For each set of Start of conversion choices, the default is given first.
| Module Setting | Start of Conversion Choices |
|---|---|
| A | Software, ePWMxA, XINT2_ADCSOC |
| B | ePWMxB, Software |
| A and B | Software, ePWMxA, ePWMxB, ePWMxA_ePWMxB, XINT2_ADCSOC |
Time in seconds between consecutive sets of samples that are converted for the selected ADC channel(s). This is the rate at which values are read from the result registers. To execute this block asynchronously, set Sample Time to -1, check the Post interrupt at the end of conversion box, and refer to Asynchronous Interrupt Processing for a discussion of block placement and other necessary settings.
To set different sample times for different groups of ADC channels, you must add separate ADC blocks to your model and set the desired sample times for each block.
Date type of the output data. Valid data types are auto, double, single, int8, uint8, int16, uint16, int32, or uint32.
Select this check box to post an asynchronous interrupt at the end of each conversion. The interrupt is always posted at the end of conversion. To execute this block asynchronously, set Sample Time to -1, and refer to Asynchronous Interrupt Processing for a discussion of block placement and other necessary settings.
Enable the Direct Memory Access (DMA) to transfer data directly from the ADC to memory, bypassing the CPU and improving overall system performance. This feature is only valid with a C28x3x target.
When enabled, this setting applies the following settings to the channel specified by the DMA Channel parameter. Disable the corresponding channel in the Target Preferences block > Peripherals > DMA_ch#. Modifications to Target Preferences block > Peripherals > DMA_ch# do not apply or override the following settings:
Enable DMA channel: Enabled for channel specified by the ADC block DMA Channel parameter.
Data size: 16 bit
Interrupt source: If the ADC block Module is A or A and B, Interrupt source is SEQ1INT. If the ADC block Module is B, Interrupt source is SEQ2INT.
Generate interrupt: Generate interrupt at end of transfer
Size
Burst: The value assigned to Burst equals the ADC block Number of conversions (NOC) multiplied by a value for the ADC block Conversion mode (CVM). To summarize, Burst = NOC * CVM.
If Conversion mode is Sequential, CVM = 1. If Conversion mode is Simultaneous, CVM = 2.
For example, Burst is 6 when NOC is 3 and CVM is 2.
Transfer: 1
SRC wrap: 65536
DST wrap: 65536
Source
Begin address: The value of Begin address is 0xB00 if the ADC block Module is A or A and B. The value of Begin address is 0xB08 if the ADC block Module is B.
Burst step: 1
Transfer step: 0
Wrap step: 0
Destination
Begin address: The value of Begin address is the ADC buffer address minus the ADC block Number of conversions.
If the target is F28232 or F28332, the ADC buffer address is 0xDFFC (57340). For other C28x3x targets, the ADC buffer address is 0xFFFC (65532).
For example, with a F28232 target, the Begin address is 0xDFF9 (57337) because the ADC buffer address, 57340 (0xDFFC), minus 3 conversions equals 57337 (0xDFF9).
Burst step: 1
Transfer step: 1
Wrap step: 0
Mode
Enable one shot mode: disabled
Sync enable: disabled
Enable continuous mode: enabled
Enable DST sync mode: disabled
Set channel 1 to highest priority: disabled
Enable overflow interrupt: disabled
For more information, consult TMS320x2833x, 2823x Direct Memory Access (DMA) Module Reference Guide, Literature Number: SPRUFB8A, available at the Texas Instruments Web site.
When the Use DMA parameter is enabled, select a channel for the DMA module to use for data transfers. To prevent channel conflicts, the same channel number must remain disabled in the Target Preferences block, otherwise the software will generate an error message.
Number of ADC channels to use for analog-to-digital conversions.
Specific ADC channel to associate with each conversion number.
In oversampling mode, a signal at a given ADC channel can be sampled multiple times during a single conversion sequence. To oversample, specify the same channel for more than one conversion. Converted samples are output as a single vector.
If more than one ADC channel is used for conversion, you can use separate ports for each output and show the output ports on the block. If you use more than one channel and do not use multiple output ports, the data is output in a single vector.
C280x/C2802x/C2803x/C28x3x/c2834x ePWM
C280x/C2802x/C2803x/C28x3x Hardware Interrupt
Configuring Acquisition Window Width for ADC Blocks
Learn more about Simulink through this collection of videos, articles, technical literature and the Getting Started with Simulink Guide.
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