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Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C2000/ Scheduling
For many systems, an execution scheduling model based on a timer interrupt is not sufficient for a real-time response to external events. The C281x Hardware Interrupt block addresses this problem by allowing for the asynchronous processing of interrupts triggered by events managed by other blocks in the C281x DSP Chip Support Library.
The following C281x blocks that can generate an interrupt for asynchronous processing are available fromEmbedded Coder:
C281x ADC
C281x CAP
C281x eCAN Receive
C281x Timer
C281x SCI Receive
C281x SCI Transmit
C281x SPI Receive
C281x SPI Transmit
Only one Hardware Interrupt block can be used in a model. To handle multiple interrupts, place a Demux block at the output of the Hardware Interrupt block to direct function calls to the appropriate function-call subsystems.
The output of this block is a function call. The size of the function call line equals the number of interrupts the block is set to handle. Each interrupt is represented by four parameters shown on the dialog box of the block. These parameters are a set of four vectors of equal length. Each interrupt is represented by one element from each parameter (four elements total), one from the same position in each of these vectors.
Each interrupt is described by:
CPU interrupt numbers
PIE interrupt numbers
Task priorities
Preemption flags
So one interrupt is described by a CPU interrupt number, a PIE interrupt number, a task priority, and a preemption flag.
The CPU and PIE interrupt numbers together uniquely specify a single interrupt for a single peripheral or peripheral module. The following table maps CPU and PIE interrupt numbers to these peripheral interrupts.
C281x Peripheral Interrupt Vector Values
| Row numbers = CPU values / Column numbers = PIE values | ||||||||
|---|---|---|---|---|---|---|---|---|
| 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | |
| 1 | WAKEINT (LPM/WD) | TINT0 (TIMER 0) | ADCINT (ADC) | XINT2 | XINT1 | Reserved | PDPINTB (EV-B) | PDPINTA (EV-A) |
| 2 | Reserved | T1OFINT (EV-A) | T1UFINT (EV-A) | T1CINT (EV-A) | T1PINT (EV-A) | CMP3INT (EV-A) | CMP2INT (EV-A) | CMP1INT (EV-A) |
| 3 | Reserved | CAPINT3 (EV-A) | CAPINT2 (EV-A) | CAPINT1 (EV-A) | T2OFINT (EV-A) | T2UFINT (EV-A) | T2CINT (EV-A) | T2PINT (EV-A) |
| 4 | Reserved | T3OFINT (EV-B) | T3UFINT (EV-B) | T3CINT (EV-B) | T3PINT (EV-B) | CMP6INT (EV-B) | CMP5INT (EV-B) | CMP4INT (EV-B) |
| 5 | Reserved | CAPINT6 (EV-B) | CAPINT5 (EV-B) | CAPINT4 (EV-B) | T4OFINT (EV-B) | T4UFINT (EV-B) | T4CINT (EV-B) | T4PINT (EV-B) |
| 6 | Reserved | Reserved | MXINT (McBSP) | MRINT (McBSP) | Reserved | Reserved | SPITXINTA (SPI) | SPIRXINTA (SPI) |
| 7 | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved |
| 8 | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved |
| 9 | Reserved | Reserved | ECAN1INT (CAN) | ECAN0INT (CAN) | SCITXINTB (SCI-B) | SCIRXINTB (SCI-B) | SCITXINTA (SCI-A) | SCIRXINTA (SCI-A) |
| 10 | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved |
| 11 | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved |
| 12 | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved | Reserved |
The task priority indicates the relative importance tasks associated with the asynchronous interrupts. If an interrupt triggers a higher-priority task while a lower-priority task is running, the execution of the lower-priority task will be suspended while the higher-priority task is executed. The lowest value represents the highest priority. Note that the default priority value of the base rate task is 40, so the priority value for each asynchronously triggered task must be less than 40 for these tasks to actually cause the suspension of the base rate task.
The preemption flag determines whether a given interrupt is preemptable or not. Preemption overrides prioritization, such that a preemptable task of higher priority can be preempted by a non-preemptable task of lower priority.
Enter a vector of CPU interrupt numbers for the interrupts you want to process asynchronously.
See the table of C281x Peripheral Interrupt Vector Values for a mapping of CPU interrupt number to interrupt names.
Enter a vector of PIE interrupt numbers for the interrupts you want to process asynchronously.
See the table of C281x Peripheral Interrupt Vector Values for a mapping of CPU interrupt number to interrupt names.
Enter a vector of task priorities for the interrupts you want to process asynchronously.
See the discussion of this block's Vectorized Output for an explanation of task priorities.
Enter a vector of preemption flags for the interrupts you want to process asynchronously.
See the discussion of this block's Vectorized Output for an explanation of preemption flags.
Select this check box if you want to be able to test asynchronous interrupt processing in the context of your Simulink software model.
Detailed information interrupt processing is in TMS320x281x DSP System Control and Interrupts Reference Guide, Literature Number SPRU078C, available at the Texas Instruments Web site.
The following links to block reference pages require that Embedded Coder is installed.
C281x Software Interrupt Trigger,C281x Timer, Idle Task
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