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C281x SPI Receive - Receive data via serial peripheral interface on target

Library

Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C2000/ C281x

Description

The C281x SPI Receive supports synchronous, serial peripheral input/output port communications between the DSP controller and external peripherals or other controllers. The block can run in either slave or master mode.

In master mode, the SPISIMO pin transmits data and the SPISOMI pin receives data. When master mode is selected, the SPI initiates the data transfer by sending a serial clock signal (SPICLK), which is used for the entire serial communications link. Data transfers are synchronized to this SPICLK, which enables both master and slave to send and receive data simultaneously. The maximum for the clock is one quarter of the DSP controller's clock frequency.

For any given model, you can have only one C281x SPI Receive block per module. There are two modules, A and B, which can be configured through the Target Preferences block.

Dialog Box

Data length

Specify how many uint16s are expected to be received. Select 1 through 16.

Initial output

Set the value the SPI node outputs to the model before it has received any data.

The default value is 0.

Enable blocking mode

If this option is selected, system waits until data is received before continuing processing.

Output receive error status

When this field is checked, the C281x SPI Receive block adds another output port for the transaction status, and appears as shown in the following figure.

Error status may be one of the following values:

  • 0: No errors

  • 1: Data loss occurred (Overrun: when FIFO disabled, Overflow: when FIFO enabled)

  • 2: Data not ready, a time-out occurred while the block was waiting to receive data

Post interrupt when data is received

Check this check box to post an asynchronous interrupt when data is received.

Sample time

Sample time, Ts, for the block's input sampling. To execute this block asynchronously, set Sample Time to -1, check the Post interrupt when message is received box, and refer to Asynchronous Interrupt Processing for a discussion of block placement and other necessary settings.

See Also

C281x SPI Transmit

C281x Hardware Interrupt

SPI_A, SPI_B, SPI_C, SPI_D

  


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