|
|
|
| R2012a Documentation → Embedded Coder | |
Learn more about Embedded Coder |
|
| Contents | Index |
Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C6000/ Optimization/ C62x DSP Library
The Vector Negate block negates each element of a 32-bit signed fixed-point input signal. For real signals, the number of input elements must be even and at least four. For complex signals, the number of input elements must be at least two. The output is the same data type as the input.
The Vector Negate block supports both continuous and discrete sample times. This block supports little-endian code generation only.
In simulation, the Vector Negate block is equivalent to the TMS320C62x DSP Library assembly code function DSP_neg32. During code generation, this block calls the DSP_neg32 routine to produce optimized code.
Learn more about Simulink through this collection of videos, articles, technical literature and the Getting Started with Simulink Guide.
| © 1984-2012- The MathWorks, Inc. - Site Help - Patents - Trademarks - Privacy Policy - Preventing Piracy - RSS |
