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Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C6000/ Optimization/ C64x DSP Library
The C64x Bit Reverse block bit-reverses the elements of each channel of a complex input signal X. The Bit Reverse block is used primarily to provide ordered inputs and outputs to or from blocks that perform FFTs. Inputs to this block must be 16-bit fixed-point data types. Input vector lengths must be a power of two. Because you use this block with FFT blocks the input vector length must be a power of two.
The Bit Reverse block supports discrete sample times and little-endian code generation only.

In simulation, the Bit Reverse block is equivalent to the TMS320C64x DSP Library assembly code function DSP_bitrev_cplx. During code generation, this block calls the DSP_bitrev_cplx routine to produce optimized code.
The Bit Reverse block reorders the output of the C64x Radix-2 FFT in the model below to natural order.

The following code calculates the same FFT in the workspace. The output from this calculation, y2, is displayed side-by-side with the output from the model, c. The outputs match, showing that the Bit Reverse block reorders the Radix-2 FFT output to natural order:
k = 4;
n = 2^k;
xr = zeros(n, 1);
xr(2) = 0.5;
xi = zeros(n, 1);
x2 = complex(xr, xi);
y2 = fft(x2);
[y2, c]
0.5000 0.5000
0.4619 - 0.1913i 0.4619 - 0.1913i
0.3536 - 0.3536i 0.3535 - 0.3535i
0.1913 - 0.4619i 0.1913 - 0.4619i
0 - 0.5000i 0 - 0.5000i
-0.1913 - 0.4619i -0.1913 - 0.4619i
-0.3536 - 0.3536i -0.3535 - 0.3535i
-0.4619 - 0.1913i -0.4619 - 0.1913i
-0.5000 -0.5000
-0.4619 + 0.1913i -0.4619 + 0.1913i
-0.3536 + 0.3536i -0.3535 + 0.3535i
-0.1913 + 0.4619i -0.1913 + 0.4619i
0 + 0.5000i 0 + 0.5000i
0.1913 + 0.4619i 0.1913 + 0.4619i
0.3536 + 0.3536i 0.3535 + 0.3535i
0.4619 + 0.1913i 0.4619 + 0.1913iC64x Radix-2 FFT, C64x Radix-2 IFFT

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