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Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C6000/ Optimization/ C64x DSP Library
The C64x Vector Multiply block performs element-wise 32-bit multiplication of two inputs X and Y. The total number of elements in each input must be a multiple or 8 and at least 16, and the inputs must have matching dimensions. The upper 32 bits of the 64-bit accumulator result are returned. All input and output elements are 32-bit signed fixed-point data types.
The Vector Multiply block supports both continuous and discrete sample times. This block supports little-endian code generation only.

In simulation, the Vector Multiply block is equivalent to the TMS320C64x DSP Library assembly code function DSP_mul32. During code generation, this block calls the DSP_mul32 routine to produce optimized code.

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