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Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C6000/ Optimization/ C64x DSP Library
The C64x Vector Negate block negates each element of a 32-bit signed fixed-point input signal. For real signals, the number of input elements must be a multiple of four, and at least eight. For complex signals, the number of input elements must be at least two. The output is the same data type as the input.
The Vector Negate block supports both continuous and discrete sample times. This block supports little-endian code generation only.

In simulation, the Vector Negate block is equivalent to the TMS320C64x DSP Library assembly code function DSP_neg32. During code generation, this block calls the DSP_neg32 routine to produce optimized code.

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