DM642 EVM FPGA GPIO Read - User GPIO registers to read from selected pins

Library

Embedded Coder/ Embedded Targets/ Processors/ Texas Instruments C6000/ DM642 EVM

Description

Added to your model, this block reads logical values from the GPIO registers you select in the dialog box and sends the data out to downstream blocks as an unsigned 8-bit word.

The DM642 EVM offers eight general purpose I/O registers that you can read from and write to for your needs. Each I/O pin represents either a logical 0 or 1 depending on the signal at the pin.

An important note — you cannot read and write to the same I/O registers with the FPGA GPIO Read and FPGA GPIO Write blocks. If you read register 1 with the read block you cannot write to register 1 with the write block. This applies to all eight registers.

Dialog Box

bit 0 to bit 7

Each bit represents the logical value at one GPIO register. Bit 0 is register 0, bit 7 is register 7. Select the bits that represent the registers to read. The read and write functions cannot share the same registers. If you select a register to read, you cannot write to that register.

Sample time

Time in seconds between consecutive inputs to the registers. Enter any real positive value or a variable name from your workspace.

See Also

DM642 EVM FPGA GPIO Write

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