Configuring Timing Parameters for CAN Blocks

On this page…
Setting Timing Parameters

Setting Timing Parameters

• Accessing the Timing Parameters

• Determining Timing Parameter Values

• CAN Bit Timing Example

Accessing the Timing Parameters

The timing parameters that control the bit rate for DM643x CAN Receive and DM643x CAN Transmit blocks are Baud rate prescaler, TSEG1, and TSEG2 in the DM643x CAN Setup block.

The following sections describe how to set these parameters.

Determining Timing Parameter Values

The following steps show you how to determine the right values to use for the timing parameters.

1. Gather these two values:

   • Bit rate of the CAN network

   • SYSCLKOUT — This is equivalent to the CAN module system clock frequency. The CAN peripheral in the DM6437 is in the CLKIN clock domain, which operates at the same frequency as the primary reference clock to the DSP. In the DM6437EVM board, the primary reference clock operates at 27 MHz.

2. Estimate the value of the Baud rate prescaler (BRP) and then solve this equation for BitTime:

   BitTime = SYSCLKOUT/(BRP * Bit rate)

3. Estimate values for TSEG1 and TSEG2 that satisfy the following equation:

   BitTime = TSEG1 + TSEG2 + 1

   The estimated values must also satisfy the following constraints:

   TSEG1 >= TSEG2

   IPT (Information Processing Time) = 3/BRP

   IPT <= TSEG1 <= 16 TQ

   IPT <= TSEG2 <= 8 TQ

   1 TQ <= SJW <= min(4 TQ, TSEG2)

   where:

   IPT is Information Processing Time, TQ is Time Quanta, and SJW is Synchronization Jump Width, which can be set in the CAN Setup block.

4. Iterate steps two and three until the values selected for TSEG1, TSEG2, and BRP meet all of the criteria.

The following illustration shows the relationship between the parameters:

CAN Bit Timing Example

This example shows how to determine CAN timing parameters.

Assume that SYSCLKOUT = 27 MHz, and a Bit rate of 1 Mbits/s is required.

1. With the Baud rate prescaler (BRP) set to 12, substitute the values of Bit rate, BRP, and SYSCLKOUT into the following equation, solving for BitTime:

   BitTime = SYSCLKOUT/(BRP * Bit rate)

   BitTime = 27MHz/(12 * 0.25 MBits/sec) = 9TQ

2. Set the values of TSEG1 and TSEG2 to 6TQ and 2TQ, respectively. Substitute the values of BitTime from the previous equation, and the chosen values for TSEG1 and TSEG2 into the following equation:

   BitTime = TSEG1 + TSEG2 + 1

   9TQ = 6TQ + 2TQ + 1

3. Finally, check the selected values against the rules:

   IPT = 3/BRP = 3/12 = .25

   IPT <= TSEG1 <= 16 TQ True! .25 <= 6TQ <= 16TQ

   IPT <= TSEG2 <= 8TQ True! .25 <= 2TQ <= 8TQ

   1TQ <= SJW <= min(4TQ, TSEG2), as a result of which SJW can be set to either 1 or 2.

4. All chosen values satisfy the criteria, so no further iteration is required.

The following table provides common timing parameter settings for typical values of Bit rate and SYSCLKOUT = 27 MHz. This clock frequency is the maximum for the DM6437 EVM blocks.

Bit rate	TSEG1	TSEG2	Bit Time	BRP	SJW
250 Kbits/sec	6	2	3	12	1 or 2
500 Kbits/sec	3	1	6	9	1
1 Mbits/sec*	6	2	9	3	1 or 2
2 Mbits/sec*	1	1	4.5	3	ERROR

* 3-time sampling in the DM643x CAN module is not possible at this Bit rate. In the DM643x CAN Setup block, the SAM parameter cannot be set to Sample three times.

References.  For detailed information on the CAN module, see TMS320DM643x DMP High-End CAN Controller User's Guide (Rev. A), Literature Number SPRU981A, available at the Texas Instruments Web site.

See Also.  DM643x CAN Setup, DM643x CAN Transmit

Back to Top

Using the C62x and C64x DSP Libraries

Hardware Issues

© 1984-2012- The MathWorks, Inc.    -   Site Help   -   Patents   -   Trademarks   -   Privacy Policy   -   Preventing Piracy   -   RSS