filWizard - Run FPGA-in-the-Loop Wizard

Syntax

Description

filWizard invokes the FPGA-in-the-Loop (FIL) Wizard. You provide the HDL code and all related information for creating a FIL block for simulation with an FPGA device.

filWizard(FILENAME) relaunches the FIL Wizard using information saved in the specified FILENAME MAT-file. At the end of each FIL Wizard session, a MAT-file that contains the session information is saved to disk. This MAT-file can be used to restore the session later.

Examples

Invoke FPGA-in-the-Loop Wizard:

>> filWizard

The FPGA-in-the-Loop Wizard starts.

How To

• Generating a FIL Block Using the FIL Wizard
• FPGA-in-the-Loop (FIL)

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