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| R2012a Documentation → HDL Verifier | |
Learn more about HDL Verifier |
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Setting Simulink Software Configuration Parameters Determining an Available Socket Port Number Checking the Connection Status |
When you create a Simulink model that includes one or more HDL Verifier Cosimulation blocks, you might want to adjust certain Simulink parameter settings to best meet the needs of HDL modeling. For example, you might want to adjust the value of the Stop time parameter in the Solver pane of the Configuration Parameters dialog box.
You can adjust the parameters individually or you can use the MATLAB file dspstartup, which lets you automate the configuration process so that every new model that you create is preconfigured with the following relevant parameter settings:
| Parameter | Default Setting |
|---|---|
| 'SingleTaskRateTransMsg' | 'error' |
| 'Solver' | 'fixedstepdiscrete' |
| 'SolverMode' | 'singletasking' |
| 'StartTime' | '0.0' |
| 'StopTime' | 'inf' |
| 'FixedStep' | 'auto' |
| 'SaveTime' | 'off' |
| 'SaveOutput' | 'off' |
| 'AlgebraicLoopMsg' | 'error' |
The default settings for SaveTime and SaveOutput improve simulation performance.
You can use dspstartup by entering it at the MATLAB command line or by adding it to the Simulink startup.m file. You also have the option of customizing dspstartup settings. For example, you might want to adjust the StopTime to a value that is optimal for your simulations, or set SaveTime to "on" to record simulation sample times.
For more information on using and customizing dspstartup, see the DSP System Toolbox documentation. For more information about automating tasks at startup, see the description of the startup command in the MATLAB documentation.
To determine an available socket number use: ttcp -a a shell prompt.
You can check the connection status by clicking the Update diagram
button
or by selecting Edit > Update Diagram. If your have
an error in the connection, Simulink will notify you.
The MATLAB command pingHdlSim can also be used to check the connection status. If a -1 is returned, then there is no connection with the HDL simulator.
In general, the last stage of cosimulation is to run and test your model. There are some steps you must be aware of when changing your model during or between cosimulation sessions. although your testing methods may vary depending on which HDL simulator you have, You can review these steps in Testing the Cosimulation.
You can run the cosimulation in one of three ways:
Start the HDL simulator and load your HDL design. For test bench
cosimulation, begin simulation first in the HDL simulator. Then, in
Simulink, click Simulation > Start or the Start Simulation
button
in
your Simulink model window. Simulink runs the model and displays any
errors that it detects. You can alternate between the HDL simulator
and Simulink GUIs to monitor the cosimulation results.
For component cosimulation, start the simulation in Simulink first, then begin simulation in the HDL simulator.
You can specify "GUI" as the property value for the run mode parameter of the HDL Verifier HDL simulator launch command, but since using the GUI is the default mode for HDL Verifier, you do not have to.
Running your cosimulation session using the command-line interface allows you to interact with the HDL simulator during cosimulation, which can be helpful for debugging.
To use the CLI, specify "CLI" as the property value for the run mode parameter of the HDL Verifier HDL simulator launch command.
Caution Close the terminal window by entering "quit -f" at the command prompt. Do not close the terminal window by clicking the "X" in the upper right-hand corner. This causes a memory-type error to be issued from the system. This is not a bug with HDL Verifier but just the way the HDL simulator behaves in this context. You can type CTRL+C to interrupt and terminate the simulation in the HDL simulator but this action also causes the memory-type error to be displayed. |
Specifying CLI mode with nclaunch (for use with Cadence Incisive)
Specifying CLI mode with vsim (for use with Mentor Graphics
ModelSim)
Running your cosimulation session in batch mode allows you to keep the process in the background, reducing demand on memory by disengaging the GUI.
To use the batch mode, specify "Batch" as the property value for the run mode parameter of the HDL Verifier HDL simulator launch command. After you issue the HDL Verifier HDL simulator launch command with batch mode specified, start the simulation in Simulink. To stop the HDL simulator before the simulation is completed, issue the breakHdlSim command.
Specifying Batch mode with nclaunch (for use with Cadence Incisive)
Specifying Batch mode with vsim (for use with Mentor Graphics
ModelSim)
If you wish to reset a clock during a cosimulation, you can do so in one of these ways:
By entering HDL simulator force commands at the HDL simulator command prompt
(ModelSim and Incisive users only) By specifying HDL simulatorforce commands in the Post- simulation command text field on the Tcl pane of the HDL Verifier Cosimulation block parameters dialog box.
See also Driving Clocks, Resets, and Enables.
If you change any part of the Simulink model, including the HDL Cosimulation block parameters, update the diagram to reflect those changes. You can do this update in one of the following ways:
Rerun the simulation
Click the Update diagram button
Select Edit > Update Diagram
In the HDL simulator, you cannot control the order in which clock signals (rising-edge or falling-edge) defined in the HDL Cosimulation block are applied, relative to the data inputs driven by these clocks. If you are careful to verify the relationship between the data and active edges of the clock, you can avoid race conditions that could create differing cosimulation results.
For more on race conditions in hardware simulators, see Avoiding Race Conditions in HDL Simulators.
 | Define the HDL Cosimulation Block Interface for Component Simulation | Recording Simulink Signal State Transitions for Post-Processing |  |
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