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TLM Component Testbench Pane Overview |
Specify options for the generation and runtime behavior of a standalone SystemC/TLM component test bench.
Generate a standalone SystemC test bench in order to verify the generated TLM component using the same input stimulus as used in Simulink.
Default: On
This parameter enables all other parameters on this pane.
| Parameter: tlmgGenerateTestbench |
| Type: string |
| Value: 'on' | 'off' |
| Default: 'on' |
Creating and Applying a Test Bench for the Generated TLM Component
Generate verbose messages during test bench execution.
Default: Off
Generate testbench enables this parameter.
| Parameter: tlmgVerboseTbMessagesOnOff |
| Type: string |
| Value: 'on' | 'off' |
| Default: 'off' |
Specify the timing mode to be used by the generated test bench and TLM component.
Default: With timing
With timing: The target annotates TLM component transactions with delays and the initiator will honor them. When a quantum keeper is not used (see Enable temporal decoupling for loosely-timed simulation), the initiator synchronizes immediately following the transaction execution. When a quantum keeper is used, the initiator utilizes temporal decoupling and does not synchronize to the annotated delays until the quantum is reached.
Without timing: The target does not annotate TLM component transaction with any delays. The initiator and target only perform synchronization using zero-time wait calls.
Generate testbench enables this parameter.
| Parameter: tlmgRuntimeTimingMode |
| Type: string |
| Value: 'With timing' | 'Without timing' |
| Default: 'With timing' |
Specify when data is moved from the input register to the execution buffer. In your TLM environment, this specification is done via a runtime configuration command and can be changed dynamically throughout simulation.
Default: Automatic
Automatic: The TLM component automatically moves input data sets from the input registers to the input buffer.
Manual: The initiator must explicitly write a command to the command and status register in order to move the input data set from the register to the input buffer.
Generate testbench enables this parameter.
| Parameter: tlmgInputBufferTriggerMode |
| Type: string |
| Value: 'Automatic' | 'Manual' |
| Default: 'Automatic' |
Input and Output Buffer Triggering Modes
Specify when data is moved from the results buffer to the output register. In your TLM environment, this specification is done via a runtime configuration command and can be changed dynamically throughout simulation.
Default: Automatic
Automatic: The TLM component automatically moves output data sets from the output buffer to the output registers.
Manual: The initiator must explicitly write a command to the command and status register in order to move the output data set from the output buffer to the output registers.
Generate testbench enables this parameter.
| Parameter: tlmgOutputBufferTriggerMode |
| Type: string |
| Value: 'Automatic' | 'Manual' |
| Default: 'Automatic' |
Input and Output Buffer Triggering Modes
![]() | TLM Generation Pane | TLM Compilation Pane | ![]() |

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