Temporal Decoupling

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Temporal Decoupling Overview Temporal Decoupling and No Buffering Temporal Decoupling and Buffering

Temporal Decoupling Overview

The TLM generator allows you to enable or disable temporal decoupling between the TLM component interface and the algorithm processing. Temporal decoupling improves simulation speed by reducing the number of synchronization points and rescheduling that occur during SystemC simulation. With temporal decoupling, the TLM component uses a quantum and allows each process to run ahead of the simulation time inside the boundary of its quantum. This arrangement creates a notion of local time in each thread that represents the thread advance as compared with the simulation time. Because the use of temporal decoupling can change the event order and process execution order, the simulation could lose some accuracy.

The following examples represent a simulation containing three threads:

• An initiator that writes data into the TLM component every 10 ms

• A TLM component that process the data

• A second initiator that reads the results

The time to write, process, or read the data is 5 ms.

In this first diagram, the simulation does not use temporal decoupling.

Without temporal decoupling, all the threads execute in sequential order and to exchange the three data the component requires nine context switches.

In this second diagram, the simulation uses temporal decoupling and a quantum of 45 ms.

With temporal decoupling, the TLM component modifies the execution order. To exchange the three data, the simulation only requires three context switches. It only requires three context switches because each thread must reach the end of its quantum before giving control back to the simulation. Even with temporal decoupling, the events and data exchanged between each thread happen at the same simulation time as without temporal decoupling. The component does not trigger events immediately but stores them in temporal queues with a timestamp (built using the local time converted into simulation time). When the triggering time is due, the queue triggers the event at the exact simulation time.

For cases when you do not select temporal decoupling, see Register and Buffering.

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Temporal Decoupling and No Buffering

When you select temporal decoupling and you do not select buffering, the TLM component queues the inputs and the outputs in temporal queues between the interface and the algorithm processing. When a thread writes data in those queues, the queue sorts the data by timestamp. In order to reproduce the behavior of a register that allows data overwriting, when a thread reads the queue, it receives the last written data before its actual local time. The TLM component also queues all events exchanged between the interface and the processing parts of the component in temporal queues. HDL Verifier generates all timings using a timing annotation to the local time.

The following image illustrates a temporal queue:

The following image demonstrates a TLM component using temporal decoupling without buffering.

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Temporal Decoupling and Buffering

When you select temporal decoupling and buffering, the TLM component queues the inputs and outputs in FIFO temporal queues between the interface and the algorithm processing. You define the simulated depth of the FIFOs in the TLM generator GUI. When a thread writes data in those queues, the queue sorts the data by timestamp. In order to reproduce the behavior of a FIFO that allows queuing of data in the limit of its simulated depth, when a thread reads the queue, it receives the last Nth written data before its actual local time (where N is the FIFO depth) . Imagine the FIFO depth as a sliding window: the data a particular thread is viewing is limited to the simulated depth of the FIFO and its view of the data moves or "slides" forward as local time advances. The following image illustrates a FIFO temporal queue:

The TLM component also queues all events exchanged between the interface and the processing parts of the TLM component in temporal queues. HDL Verifier generates all timings using a timing annotation to the local time.

The following image demonstrates a TLM component using temporal decoupling and buffering.

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Register and Buffering

TLM Component Timing Values

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