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R2011b Documentation → EDA Simulator Link
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Contents

Index

• Getting Started

• Product Overview

Product Description

Product Limitations

• Using EDA Simulator Link with HDL Simulators

HDL Cosimulation with MATLAB or Simulink and the HDL Simulator

Communications for HDL Cosimulation

Hardware Description Language (HDL) Support

HDL Cosimulation Workflows Described in the User Guide

• Using EDA Simulator Link with Virtual Platforms

Generating TLM Components for Use with Virtual Platform Development

Typical Users and Applications

• Using EDA Simulator Link with FPGA Development Environment

FPGA-in-the-Loop Simulation

FPGA Automation

Installing the Link Software

Installing Related Application Software

What You Need to Know

• Required Products

Supported EDA Tools

System Requirements

Product Feature and Platform Support

Optional Application Software

Information Overview

Using "What's This?" Context-Sensitive Help

• Demos and Tutorials

• Quick Start: Using The Cosimulation Wizard

Overview to the Cosimulation Wizard

Creating a Function from Existing HDL Code

Creating a Block from Existing HDL Code

Using the Cosimulation Wizard

Performing Cosimulation

• Quick Start: Using the FPGA-in-the-Loop Wizard

Preparing to Use the FPGA-in-the-Loop (FIL) Wizard

Running the FIL Wizard

Performing FIL Simulation

• User's Guide

• HDL Verification with Cosimulation

• FPGA-in-the-Loop and FPGA Automation

• SystemC TLM 2.0 Generation

How TLM Component Generation Works

• TLM Component Architecture

Overview of Component Features

• Memory Mapping

• Command and Status Register

Test and Set Register

Algorithm Execution

• Register and Buffering

• Temporal Decoupling

TLM Component Timing Values

TLM Component Naming and Packaging

• Generate TLM Component

• User Workflow for TLM Component Generation

Select Subsystem

Select System Target File to Activate TLM Component Generation Options

Select Features for Generated TLM Component

Select Options for Associated Test Bench

Specify Attributes for Generated makefile

Generate TLM Component

Verify the Generated TLM Component

• Run TLM Component Test Bench

• Testing TLM Components

• TLM Component Test Bench Generation Options

• Export TLM Component to SystemC Environment

• TLM Component Compiler Options

• Using the Generated TLM Component Files

TLM Component Constructor and Default Parameters

• Configuration Parameters for TLM Generator Target

• TLM Generation Pane

• TLM Testbench Pane

• TLM Compilation Pane

• Release Notes

SystemC TLM 2.0 Generation

EDA Link Pane

How TLM Component Generation Works

How TLM Component Generation Works

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