HDL File Names and Locations

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Setting the Location of Generated Files Naming the Generated Files and Filter Entity Setting File Name Extensions Splitting Entity and Architecture Code Into Separate Files

Setting the Location of Generated Files

By default, the coder places all generated HDL files in the subfolder hdlsrc under your current working folder. To direct the coder output to a folder other than the default target folder, you can use either the Folder field or the Browse button in the Target pane of the Generate HDL dialog box.

Clicking on the Browse button opens a browser window that lets you select (or create) the folder to which generated code will be written. When the folder is selected, the full path and folder name are automatically entered into the Folder field.

Alternatively, you can enter the folder specification directly into the Folder field. If you specify a folder that does not exist, the coder creates the folder for you before writing the generated files. Your folder specification can be one of the following:

• Folder name. In this case, the coder looks for the subfolder under your current working folder. If it cannot find the specified folder, the coder creates it.

• An absolute path to a folder under your current working folder. If the coder cannot find the specified folder, the coder creates it.

• A relative path to a higher level folder under your current working folder. For example, if you specify ../../../myfiltvhd, the coder checks whether a folder named myfiltvhd exists three levels up from your current working folder, creates the folder if it does not exist, and writes all generated HDL files to that folder.

In the following figure, the folder is set to MyFIRBetaVHDL.

Given this setting, the coder creates the subfolder MyFIRBetaVHDL under the current working folder and writes generated HDL files to that folder.

Command Line Alternative: Use the generatehdl function with theTargetDirectory property to redirect coder output.

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Naming the Generated Files and Filter Entity

To set the string that the coder uses to name the filter entity or module and generated files, specify a new value in the Name field of the Filter settings pane of the Generate HDL dialog box. The coder uses the Name string to

• Label the VHDL entity or Verilog module for your filter

• Name the file containing the HDL code for your filter

• Derive names for the filter's test bench and package files

Derivation of File Names

By default, the coder creates the HDL files listed in the following table. File names in generated HDL code derive from the name of the filter for which the HDL code is being generated and the file type extension .vhd or .v for VHDL and Verilog, respectively. The table lists example file names based on filter name Hq.

Language	Generated File	File Name	Example
Verilog	Source file for the quantized filter	dfilt_name.v	Hq.v
	Source file for the filter's test bench	dfilt_name_tb.v	Hq_tb.v
VHDL	Source file for the quantized filter	dfilt_name.vhd	Hq.vhd
	Source file for the filter's test bench	dfilt_name_tb.vhd	Hq_tb.vhd
	Package file, if required by the filter design	dfilt_name_pkg.vhd	Hq_pkg.vhd

By default, the coder generates a single test bench file, containing all test bench helper functions, data, and test bench code. You can split these elements into separate files, as described in Splitting Test Bench Code and Data into Separate Files.

By default, the code for a filter's VHDL entity and architectures is written to a single VHDL source file. Alternatively, you can specify that the coder write the generated code for the entity and architectures to separate files. For example, if the filter name is Hd, the coder writes the VHDL code for the filter to files Hd_entity.vhd and Hd_arch.vhd (see Splitting Entity and Architecture Code Into Separate Files).

Derivation of Entity Names

The coder also uses the filter name to name the VHDL entity or Verilog module that represents the quantized filter in the HDL code. Assuming a filter name of Hd, the name of the filter entity or module in the HDL code is Hd.

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Setting File Name Extensions

Setting the VHDL File Name Extension

By default, the filter HDL files are generated with a .vhd or .v file extension, depending on the language selection. To change the file extension,

1. Select the Global Settings tab on the Generate HDL dialog box.

2. Select the General tab in the Additional settings pane.

3. Type the new file extension in the Verilog file extension or VHDL file extension field.

Based on the following settings, the coder generates the filter file MyFIR.vhdl.

Note   When specifying strings for file names and file type extensions, consider platform-specific requirements and restrictions. Also consider postfix strings that the coder appends to the Name string, such as _tb and_pkg.

Command Line Alternative: Use the generatehdl function with the Name property to set the name of your filter entity and the base string for generated HDL file names. Specify the function with the VerilogFileExtension or VHDLFileExtension property to specify a file type extension for generated HDL files.

Setting the Verilog File Name Extension

By default, the filter HDL files are generated with a .vhd or .v file extension, depending on the language selection. To change the file extension,

1. Select the Global Settings tab on the Generate HDL dialog box.

2. Select the General tab in the Additional settings pane.

3. Type the new file extension in the Verilog file extension or VHDL file extension field.

Based on the following settings, the coder generates the filter file MyFIR.vhdl.

Note   When specifying strings for file names and file type extensions, consider platform-specific requirements and restrictions. Also consider postfix strings that the coder appends to the Name string, such as _tb and_pkg.

Command Line Alternative: Use the generatehdl function with the Name property to set the name of your filter entity and the base string for generated HDL file names. Specify the function with the VerilogFileExtension or VHDLFileExtension property to specify a file type extension for generated HDL files.

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Splitting Entity and Architecture Code Into Separate Files

By default, the coder includes a filter's VHDL entity and architecture code in the same generated VHDL file. Alternatively, you can instruct the coder to place the entity and architecture code in separate files. For example, instead of all generated code residing in MyFIR.vhd, you can specify that the code reside in MyFIR_entity.vhd and MyFIR_arch.vhd.

The names of the entity and architecture files derive from

• The base file name, as specified by the Name field in the Target pane of the Generate HDL dialog box

• Default postfix string values _entity and _arch

• The VHDL file type extension, as specified by the VHDL file extension field on the General pane of the Generate HDL dialog box

To split the filter source file, do the following:

1. Select the Global Settings tab on the Generate HDL dialog box.

2. Select the General tab in the Additional settings pane.

3. Select Split entity and architecture. The Split entity file postfix and Split arch. file postfix fields are now enabled.

   

4. Specify new strings in the postfix fields if you want to use postfix string values other than _entity and _arch to identify the generated VHDL files.

   Note   When specifying a string for use as a postfix value in file names, consider the size of the base name and platform-specific file naming requirements and restrictions.

Command Line Alternative: Use the generatehdl function with the property SplitEntityArch to split the filter's VHDL code into separate files. Use properties SplitEntityFilePostfix and SplitArchFilePostfix to rename the file name postfix for VHDL entity and architecture code components.

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Customization of HDL Filter Code

HDL Identifiers and Comments

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