Introduction

About Configuring Models for Concurrent Execution

Configuring your model for concurrent execution in the Simulink environment enables you to capture and simulate the effects of deploying your design to a multicore system. A model that is configured for concurrent execution gives you control over how a design should execute on a multicore target. It allows the design to be mapped into concurrently executing tasks. Subsequently, the Simulink environment enables the simulation of the mapped design by identifying data transfer points and by simulating the mapped design in conjunction with data transfer latencies. You can deploy the design to a multicore system using Simulink Coder, Embedded Coder, and xPC Target™ software.

You can use simulation results to identify whether a mapping scheme is suitable with respect to the functional characteristics of the design. You can also explore alternate partitioning schemes using a mapping interface. In addition, you can use profiling results on the deployed design to validate if the mapping scheme is efficiently using the multicore system.

• Create a new model configuration or extend existing configurations for concurrent execution.

• Use the Model block to define potential opportunities for concurrency in your design.

• Set up and configure concurrent on-target tasks using a task editing interface.

• Use either the GUI or command-line interface to iteratively map design partitions (based on Model blocks) to tasks and find optimal concurrent execution scenarios.

• Generate code that uses threading APIs on Windows, Linux^®, or xPC Target platforms for on-target execution.

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Supported Targets

You can build and download concurrent execution models for the following targets using system target files:

• Linux, Windows, and Mac OS^® using ert.tlc and grt.tlc.

• xPC Target using xpctarget.tlc and xpctargetert.tlc.

• Linux and Windows using idelink_ert.tlc and idelink_grt.tlc.

• Embedded Linux and VxWorks^® using idelink_ert.tlc and idelink_grt.tlc.

Note   Deploying to embedded Linux and VxWorks targets requires the Embedded Coder product.

You cannot build and download a model, configured for concurrent execution, for field-programmable gate arrays (FPGAs) and programmable logic controllers (PLCs). For FPGA optimization and hardware utilization techniques, see the "Streaming, Resource Sharing, and Delay Balancing" chapter of the HDL Coder™ User's Guide.

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Helpful Terms

Task — Object that corresponds to a thread of execution on a target. From within the Simulink environment, you can specify tasks, configure their properties, and map Model blocks to them.

Task configuration — Configuration properties that apply to the set of tasks set up for your multicore system.

Trigger — Abstraction of operating system timers, signals, interrupts, and system events.

Aperiodic trigger — Event trigger that has no inherent periodicity, such as an interrupt. When multiple triggers coexist, the software assumes that they are asynchronous to each other.

Periodic triggers — Periodic event trigger such as an operating system trigger.

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Software Requirements

• To build and download your model, you must have Simulink Coder software installed.

• To build and download your model to an xPC Target system, you must have xPC Target software installed. You must also have a multicore target system supported by the xPC Target product.

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Configuring Models for Targets with Multicore Processors

Design Considerations

Related Products & Applications

• Simulink
• Control Design
• Signal Processing & Communications
• Model-Based Design
• Physical Modeling
• Verification & Validation

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