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About Model Verification Blocks

Simulink Control Design software provides Model Verification blocks to monitor time- and frequency-domain characteristics of a linear system computed from a nonlinear Simulink model during simulation.

Use these blocks to:

The verification blocks assert when the linear system characteristic does not satisfy a specified bound, i.e., assertion fails. A warning message, reporting the assertion failure, appears at the MATLAB prompt. When assertion fails, you can:

You can use these blocks with the Simulink Model Verification blocks to design complex logic for assertion. For an example, see Model Verification Using Simulink Control Design and Simulink Verification Blocks .

If you have Simulink® Verification and Validation™ software, you can use the Verification Manager tool in the Signal Builder to construct simulation tests for your model. For an example, see the Verifying Frequency-Domain Characteristics of an Aircraft demo.

  


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