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| R2012a Documentation → Simulink Design Verifier | |
Learn more about Simulink Design Verifier |
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| Contents | Index |
The Simulink Design Verifier software is part of your MATLAB installation.
To open the Simulink Design Verifier block library, type at the MATLAB prompt, type sldvlib.
The Simulink Design Verifier block library has three categories of blocks:
Objectives and Constraints — Blocks that define custom objectives and constraints
Temporal Operators — Blocks that define temporal properties on Boolean signals
Verification Utilities — Miscellaneous verification utilities
The block library also has a sublibrary, Example Properties, that includes examples of how to specify common properties in your model. You can easily adapt these examples for use in your models.
 | Before You Begin | Analyzing a Model |  |
Learn more about Simulink through this collection of videos, articles, technical literature and the Getting Started with Simulink Guide.
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