HDL Code Generation Pane: EDA Tool Scripts

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EDA Tool Scripts Overview Generate EDA scripts Generate multicycle path information Compile file postfix Compile initialization Compile command for VHDL Compile command for Verilog Compile termination Simulation file postfix Simulation initialization Simulation command Simulation waveform viewing command Simulation termination Choose synthesis tool Synthesis file postfix Synthesis initialization Synthesis command Synthesis termination

EDA Tool Scripts Overview

The EDA Tool Scripts pane lets you set all options that control generation of script files for third-party HDL simulation and synthesis tools.

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Generate EDA scripts

Enable generation of script files for third-party electronic design automation (EDA) tools. These scripts let you compile and simulate generated HDL code and/or synthesize generated HDL code.

Settings

Default: On

On

Generation of script files is enabled.

Off

Generation of script files is disabled.

Command-Line Information

Parameter: EDAScriptGeneration

Type: string

Value: 'on' | 'off'

Default: 'on'

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• EDAScriptGeneration

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Generate multicycle path information

Generate a file that reports multicycle path constraint information.

Settings

Default: Off

On

Generate a text file that reports multicycle path constraint information, for use with synthesis tools.

Off

Do not generate a multicycle path information file.

Command-Line Information

Parameter: MulticyclePathInfo

Type: string

Value: 'on' | 'off'

Default: 'off'

See Also

• Generating a Multicycle Path Information File

• MulticyclePathInfo

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Compile file postfix

Specify a postfix string appended to the DUT or test bench name to form the compilation script file name.

Settings

Default: _compile.do

For example, if the name of the device under test or test bench is my_design, the coder adds the postfix _compile.do to form the name my_design_compile.do.

Command-Line Information

Property: HDLCompileFilePostfix

Type: string

Default: '_compile.do'

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLCompileFilePostfix

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Compile initialization

Specify a format string passed to fprintf to write the Init section of the compilation script.

Settings

Default: vlib %s\n

The Init phase of the script performs any required setup actions, such as creating a design library or a project file.

The argument %s is the contents of the 'VHDLLibraryName' property, which defaults to'work'. You can override the default Init string ('vlib work\n' by changing the value of 'VHDLLibraryName'.

Command-Line Information

Property: HDLCompileInit

Type: string

Default: 'vlib %s\n'

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLCompileInit

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Compile command for VHDL

Specify a format string passed to fprintf to write the Cmd section of the compilation script for VHDL files.

Settings

Default: vcom %s %s\n

The command-per-file phase (Cmd) of the script is called iteratively, once per generated HDL file or once per signal. On each call, a different file or signal name is passed in.

The two arguments in the compile command are the contents of the SimulatorFlags property and the file name of the current entity or module. To omit the flags, set SimulatorFlags to '' (the default).

Command-Line Information

Property: HDLCompileVHDLCmd

Type: string

Default: 'vcom %s %s\n'

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLCompileVHDLCmd

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Compile command for Verilog

Specify a format string passed to fprintf to write the Cmd section of the compilation script for Verilog files.

Settings

Default: vlog %s %s\n

The command-per-file phase (Cmd) of the script is called iteratively, once per generated HDL file or once per signal. On each call, a different file or signal name is passed in.

The two arguments in the compile command are the contents of the SimulatorFlags property and the file name of the current entity or module. To omit the flags, set SimulatorFlags property to '' (the default).

Command-Line Information

Property: HDLCompileVerilogCmd

Type: string

Default: 'vlog %s %s\n'

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLCompileVerilogCmd

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Compile termination

Specify a format string passed to fprintf to write the termination portion of the compilation script.

Settings

Default: empty string

The termination phase (Term) is the final execution phase of the script. One application of this phase is to execute a simulation of HDL code that was compiled in the Cmd phase. The Term phase takes no arguments.

Command-Line Information

Property: HDLCompileTerm

Type: string

Default: ''

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLCompileTerm

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Simulation file postfix

Specify a postfix string appended to the DUT or test bench name to form the simulation script file name.

Settings

Default: _sim.do

For example, if the name of the device under test or test bench is my_design, the coder adds the postfix _sim.do to form the name my_design_sim.do.

Command-Line Information

Property: HDLSimFilePostfix

Type: string

Default: '_sim.do'

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLSimFilePostfix

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Simulation initialization

Specify a format string passed to fprintf to write the initialization section of the simulation script.

Settings

Default: The default string is

 ['onbreak resume\nonerror resume\n'] 

The Init phase of the script performs any required setup actions, such as creating a design library or a project file.

Command-Line Information

Property: HDLSimInit

Type: string

Default: ['onbreak resume\nonerror resume\n']

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLSimInit

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Simulation command

Specify a format string passed to fprintf to write the simulation command.

Settings

Default: vsim -novopt work.%s\n

The implicit argument is the top-level module or entity name.

Command-Line Information

Property: HDLSimCmd

Type: string

Default: 'vsim -novopt work.%s\n'

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane.

• HDLSimCmd

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Simulation waveform viewing command

Specify the waveform viewing command written to simulation script.

Settings

Default: add wave sim:%s\n

The implicit argument is the top-level module or entity name.

Command-Line Information

Property: HDLSimViewWaveCmd

Type: string

Default: 'add wave sim:%s\n'

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLSimViewWaveCmd

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Simulation termination

Specify a format string passed to fprintf to write the termination portion of the simulation script.

Settings

Default: run -all\n

The termination phase (Term) is the final execution phase of the script. One application of this phase is to execute a simulation of HDL code that was compiled in the Cmd phase. The Term phase takes no arguments.

Command-Line Information

Property: HDLSimTerm

Type: string

Default: 'run -all\n'

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLSimTerm

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Choose synthesis tool

Enable or disable generation of synthesis scripts, and select the synthesis tool for which the coder generates scripts.

Settings

Default: None

None

When you select None, the coder does not generate a synthesis script. The coder clears and disables all fields in the Synthesis script pane.

Altera Quartus II

Generate a synthesis script for Altera Quartus II. When you select this option, the coder:

• Enables all fields in the Synthesis script pane.

• Sets Synthesis file postfix to _quartus.tcl

• Fills in the Synthesis initialization, Synthesis command and Synthesis termination fields with TCL script code for the tool.

Mentor Graphics Precision

Generate a synthesis script for Mentor Graphics Precision. When you select this option, the coder:

• Enables all fields in the Synthesis script pane.

• Sets Synthesis file postfix to _precision.tcl

• Fills in the Synthesis initialization, Synthesis command and Synthesis termination fields with TCL script code for the tool.

Synopsys Synplify Pro

Generate a synthesis script for Synopsys Synplify Pro. When you select this option, the coder:

• Enables all fields in the Synthesis script pane.

• Sets Synthesis file postfix to _synplify.tcl

• Fills in the Synthesis initialization, Synthesis command and Synthesis termination fields with TCL script code for the tool.

Xilinx ISE

Generate a synthesis script for Xilinx ISE. When you select this option, the coder:

• Enables all fields in the Synthesis script pane.

• Sets Synthesis file postfix to _ise.tcl

• Fills in the Synthesis initialization, Synthesis command and Synthesis termination fields with TCL script code for the tool.

Command-Line Information

Property: HDLSynthTool

Type: string

Value: 'None' | 'ISE' | 'Precision' | 'Quartus' | 'Synplify'

Default: 'None'

See Also

HDLSynthTool

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Synthesis file postfix

Specify a postfix string appended to file name for generated synthesis scripts.

Settings

Default: None.

Your choice of synthesis tool (from the Choose synthesis tool pulldown menu) sets the postfix for generated synthesis file names to one of the following:

_ise.tcl

_precision.tcl

_quartus.tcl

_synplify.tcl

For example, if the DUT name is my_designand the choice of synthesis tool is Synopsys Synplify Pro, the coder adds the postfix _synplify.tcl to form the name my_design_synplify.tcl.

Command-Line Information

Property: HDLSynthFilePostfix

Type: string

Default: none

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLSynthFilePostfix

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Synthesis initialization

Specify a format string passed to fprintf to write the initialization section of the synthesis script.

Settings

Default: none.

Your choice of synthesis tool (from the Choose synthesis tool pulldown menu) sets the Synthesis initialization string. The default string is a format string passed to fprintf to write the Init section of the synthesis script. The default string is a synthesis project creation command. The implicit argument is the top-level module or entity name. The content of the string is specific to the selected synthesis tool.

Command-Line Information

Property: HDLSynthInit

Type: string

Default: none

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLSynthInit

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Synthesis command

Specify a format string passed to fprintf to write the synthesis command.

Settings

Default: none.

Your choice of synthesis tool (from the Choose synthesis tool pulldown menu) sets the Synthesis command string. The default string is a format string passed to fprintf to write the Cmd section of the synthesis script. The argument is the filename of the entity or module. The content of the string is specific to the selected synthesis tool.

Command-Line Information

Property: HDLSynthCmd

Type: string

Default: none

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLSynthCmd

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Synthesis termination

Specify a format string passed to fprintf to write the termination portion of the synthesis script.

Settings

Default: none

Your choice of synthesis tool (from the Choose synthesis tool pulldown menu) sets the Synthesis termination string. The default string is a format string passed to fprintf to write the Term section of the synthesis script. The termination string does not take any arguments. The content of the string is specific to the selected synthesis tool.

Command-Line Information

Property: HDLSynthTerm

Type: string

Default: none

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Pane

• HDLSynthTerm

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HDL Code Generation Pane: Test Bench

Specifying Block Implementations and Parameters for HDL Code Generation

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