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R2011b Documentation → Simulink HDL Coder
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Contents

Index

• Getting Started

Automated HDL Code Generation in the Hardware Development Process

Summary of Key Features

Software Requirements

Installing the Software

• User's Guide

• Introduction to HDL Code Generation

• Code Generation Options in the Simulink HDL Coder Dialog Boxes

• Specifying Block Implementations and Parameters for HDL Code Generation

• Guide to Supported Blocks and Block Implementations

• Generating HDL Code for Multirate Models

• The hdldemolib Block Library

• Streaming, Resource Sharing, and Delay Balancing

• Generating Bit-True Cycle-Accurate Models

• Code Generation Reports, HDL Compatibility Checker, Block Support Library, and Code Annotation

• Interfacing Subsystems and Models to HDL Code

Overview of HDL Interfaces

• Black Box Implementation for Subsystem Blocks

What Is a Black Box Interface?

Generating a Black Box Interface for a Subsystem

Generating Code for a Black Box Subsystem Implementation

• Generating Reusable Code for Atomic Subsystems

Generating Reusable Code for Identical Atomic Subsystems

Generating Reusable Code for Atomic Subsystems with Tunable Mask Parameters

Generating Interfaces for Referenced Models

• Code Generation for Enabled and Triggered Subsystems

Code Generation for Enabled Subsystems

Code Generation for Triggered Subsystems

Best Practices for Using Enabled and Triggered Subsystems

Code Generation for HDL Cosimulation Blocks

• Generating a Simulink Model for Cosimulation with an HDL Simulator

Generating a Cosimulation Model from the GUI

Structure of the Generated Model

Launching a Cosimulation

The Cosimulation Script File

Complex and Vector Signals in the Generated Cosimulation Model

Generating a Cosimulation Model from the Command Line

Naming Conventions for Generated Cosimulation Models and Scripts

Limitations for Cosimulation Model Generation

Customizing the Generated Interface

Pass-Through and No-Op Implementations

Limitation on Generated Verilog Interfaces

• Stateflow HDL Code Generation Support

• Generating HDL Code with the MATLAB Function Block

• Generating Scripts for HDL Simulators and Synthesis Tools

• Using the HDL Workflow Advisor

• HDL Workflow Advisor Tasks

• Code Generation Control Files

• Property Reference

• Release Notes

Interfacing Subsystems and Models to HDL Code

Adding and Removing the HDL Configuration Component

Adding and Removing the HDL Configuration Component

Overview of HDL Interfaces

Overview of HDL Interfaces

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