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| R2011b Documentation → Simulink HDL Coder | |
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The Bitwise Operator sublibrary provides commonly used operations on bits and bit fields.
All Bitwise Operator blocks support:
Scalar and vector inputs
Fixed-point, integer (signed or unsigned), and Boolean data types
A maximum word size of 128 bits
Bitwise Operator blocks do not currently support:
Double, single, or complex data types
Matrix inputs
To open the Bitwise Operators sublibrary, double-click its icon
in the hdldemolib window.
Alternatively, you can open the Bitwise Operators sublibrary directly
by typing the following command at the MATLAB prompt:
hdldemolib_bitops
The following figure shows the Bitwise Operators sublibrary.
The Bit Concat block concatenates up to 128 input words into a single output. The input port labeled L designates the lowest-order input word; the port labeled H designates the highest-order input word. The right-left ordering of words in the output follows the low-high ordering of input signals.
The operation of the block depends on the number and dimensions of the inputs, as follows:
Single input: The input can be a scalar or a vector. When the input is a vector, the coder concatenates all individual vector elements together.
Two inputs: Inputs can be any combination of scalar and vector. When one input is scalar and the other is a vector, the coder performs scalar expansion. Each vector element is concatenated with the scalar, and the output has the same dimension as the vector. When both inputs are vectors, they must have the same size.
Three or more inputs (up to a maximum of 128 inputs): Inputs must be uniformly scalar or vector. All vector inputs must have the same size.
Input: Fixed-point, integer (signed or unsigned), Boolean
Output: Unsigned fixed-point or integer (Maximum concatenated output word size: 128 bits)
Implementation: default
Implementation Parameters: InputPipeline, OutputPipeline
Number of Inputs: Enter an integer specifying the number of input signals. The number of input ports displayed on the block updates when Number of Inputs changes.
Default: 2.
Minimum: 1
Maximum: 128
Caution Make sure that the Number of Inputs is equal to the number of signals you connect to the block. If unconnected inputs are present on the block, an error will occur at code generation time. |
The Bit Reduce block performs a selected bit reduction operation (AND, OR, or XOR) on all the bits of the input signal, reducing it to a single-bit result.
Input: Fixed-point, integer (signed or unsigned), Boolean
Output: always ufix1
Implementation: default
Implementation Parameters: InputPipeline, OutputPipeline
Reduction Mode
Default: AND
Specifies the reduction operation, as follows:
AND: Perform a bitwise AND reduction of the input signal.
OR: Perform a bitwise OR reduction of the input signal.
XOR: Perform a bitwise XOR reduction of the input signal.
The Bit Rotate block rotates the input signal left or right by a specified number of bit positions.
Input: Fixed-point, integer (signed or unsigned), Boolean
Minimum word size: 2 bits
Maximum word size: 128 bits
Output: Has the same data type as the input signal
Implementation: default
Implementation Parameters: InputPipeline, OutputPipeline
Rotate Mode: Specifies direction of rotation, either left or right.
Default: Rotate Left
Rotate Length: Specifies the number of bits to be rotated. Rotate Length must be greater than or equal to zero.
Default: 0
The Bit Shift block performs a logical or arithmetic shift on the input signal.
Input: Fixed-point, integer (signed or unsigned), Boolean
Minimum word size: 2 bits
Maximum word size: 128 bits
Output: Has the same data type as the input signal
Implementation: default
Implementation Parameters: InputPipeline, OutputPipeline
Shift Mode
Default: Shift Left Logical
Specifies the type and direction of shift, as follows:
Shift Left Logical
Shift Right Logical
Shift Right Arithmetic
Shift Length
Default: 0
Specifies the number of bits to be shifted. Shift Length must be greater than or equal to zero.
The Bit Slice block returns a field of consecutive bits from the input signal. The lower and upper boundaries of the bit field are specified by zero-based indices entered in the LSB Position and MSB Position parameters.
Input: Fixed-point, integer (signed or unsigned), Boolean
Output: unsigned fixed-point or unsigned integer
Implementation: default
Implementation Parameters: InputPipeline, OutputPipeline
MSB Position
Default: 7
Specifies the bit position (zero-based) of the most significant bit (MSB) of the field to be extracted.
For an input word size WS, LSB Position and MSB Position should satisfy the following constraints:
WS > MSB Position >= LSB Position >= 0;
The word length of the output is computed as (MSB Position - LSB Position) + 1.
LSB Position
Default: 0
Specifies the bit position (zero-based) of the least significant bit (LSB) of the field to be extracted.
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