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MPL PATI
The MPL PowerPC controlled Analog and Timing I/O Intelligence (PATI) has 32 32-bit TPU channels, which the xPC Target software supports for PWM measurement, PWM generation, time base selection, incremental encoder measurement, and digital I/O. It is based on the Freescale™ MPC555 processor. the xPC Target software supports only the TPU channels for this board. The xPC Target block library supports the MPL PATI board with these driver blocks:
The xPC Target block library supports this board with these driver blocks:
When installing MPL PATI boards, note the following slot selection configuration settings. In the following, the first number after the S indicates the switch number (1) and the second number indicates the switch.
S1-1 and S1-2 — Select the stacking position in which the board is found. Use the following settings:
First board: S1-1 — off, S1-2 — off
Second board: S1-1 — on, S1-2 — off
Third board: S1-1 — off, S1-2 — on
Fourth board: S1-1 — on, S1-2 — on
S3 — off
S4 — on (enable reboot)
S5 — off
S6 — off
S7 — off
S8 — off
See the MPL PATI user documentation for a description of the DIP switch S1. For some target PC CPU boards, you might be limited to two PC/104+ boards, for others, you might be able to add up to four PC/104+ boards.
Board name | MPL PATI |
Manufacturer | MPL |
Bus type | PCI/104 |
Multiple block instance support | Yes |
Multiple board support | Yes |

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