WDG-CSM Watchdog Timer block (not recommended)
Simulink® Real-Time™ Library of Drivers No Longer Recommended for Use
Enter a timeout value in seconds.
Select this check box to enable an input port on the driver block. A signal connected to this port resets the watchdog.
Enter the base sample time or a multiple of the base sample
-1 means sample time is inherited).
Enter the base address of the board. This entry must correspond
to the DIP switch setting on the board. For example, if the DIP switch
setting is 300 (hexadecimal), enter