What is the difference between wr_dout and r_dout ports of a Dual-port RAM in the hdldemolib? Please give a detailed explanation (if possible with an example)
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Dear community members, any help is appreciated. Thank you.
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Tim McBrayer
on 3 Jul 2014
This is straightforward. The Dual Port RAM has two address inputs; wr_addr and rd_addr. wr_dout is the contents of the address wr_addr, and rd_dout is the contents of the address rd_addr.
The documentation is quite short and clear as to the specific behavior of all the ports, and tradeoffs between the various RAM blocks.
>> web(fullfile(docroot, 'simulink/slref/dualportram.html'))
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Tim McBrayer
on 8 Jul 2014
There is only one write data port; you can only write one word of data at a time. This is why the ports are named the way that they are. The capability of the Simulink RAM blocks are specifically designed to match the synthesis templates that are shared by all major synthesis tools, so that the implementation maps to the underlying on-chip block RAMS.
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