Why does the overflow test case generated by Simulink Design Verifier (ver. 2.7) not overflow during simulation?

When using the Simulink Design Verifier to detect design errors, I receiver an "Overflow" error during inspection that does not occur during test simulation. What is the issue and how can I fix it? 

Answer 1

[MathWorks Support Team]

Overflow test cases reported by Simulink Design Verifier on some built-in blocks, e.g. N-D Lookup Table, may not overflow in simulation. In such cases, Simulink Design Verifier reports a benign overflow due to a current limitation of analysis. At this time, there is no workaround to disable detection of such a benign overflow.