HDL Coder: how to divide (eg, 1/3) using simulink when the divisor is not 2^x

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hello guys/girls,
how to perform the division of 1/3 in simulink for HDL code generation. I keep having the synthesis problem saying that the divisor need to be a value of 2^x .

Accepted Answer

Tim McBrayer
Tim McBrayer on 3 Sep 2013
Certain synthesis tools do not support division of arbitrary numbers; this is why you are encountering this restriction. The most straightforward way to generate a synthesizable division is to use the Product block in division mode by setting its inputs to '*/'. Then you can choose either the 'RecipNewton' or 'RecipNewtonSingleRate' implementation. These avoid the use of the '/' operator.
  3 Comments
Tim McBrayer
Tim McBrayer on 4 Sep 2013
Edited: Tim McBrayer on 4 Sep 2013
The RecipNewton implementation is a HDL Coder option on the Product block. You can reach the HDL Block Options on any HDL-supported block by right-clicking on the block in your model and choosing "HDL Code->HDL Block Properties...". On the Product block, you can then change the 'Architecture' field from the default 'Linear' to 'RecipNewton'. The RecipNewton method is only valid when the block is in division mode; HDL Coder will error out should you choose this architecture when the block is configured for multiplication.
The architecture field describes how the HDL code will be generated for the block. It does not affect Simulink simulation. If the implementation introduces latency, as the RecipNewton architecture can, HDL Coder will notify you of the additional latency that has been inserted. The generated HDL testbench will be automatically adjusted to reflect the change in latencies.

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More Answers (1)

Walter Roberson
Walter Roberson on 2 Sep 2013
1/3 = 1/4 + 1/16 + 1/64 + 1/256 (etc.)
So do all those divisions by 2^x and sum the result.

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