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from Code Verification using RTDX by Kerry Schutz
Verify your DSP Implementation using RTDX and Simulink

profileReport_sa_LMS.html
Profile Report
Profile Report

Simulink model: sa_LMS.mdl
Target: C6416DSK

Report of profile data from Code Composer Studio (tm)
13-Aug-2006 07:54:07



Timing constants

Base sample time 32 ms
CPU Clock speed1 720 MHz



Profiled Simulink Subsystems

System name sa_LMS
STS object stsSys2_OutputUpdate
Max time spent in this subsystem
per interrupt
2.971 ms
Max percent of base interval 9.28%
Number of iterations counted 628


System name sa_LMS/LMSss
STS object stsSys0_OutputUpdate
Max time spent in this subsystem
per interrupt
1.983 ms
Max percent of base interval 6.2%
Number of iterations counted 628


System name sa_LMS/Noise Generator
STS object stsSys1_OutputUpdate
Max time spent in this subsystem
per interrupt
658 µs
Max percent of base interval 2.06%
Number of iterations counted 628



Notes

1. The CPU Clock Speed is assumed to be 720 MHz. If your board uses a different clock speed, then you must specify the new speed in RTW Options.

2. STS timing objects associated with subsystem profiling are configured for a host-side operation of 8*x, reflecting the numerical relationship between CPU clock cycles and high-resolution timer clicks. Therefore, STS Max, Total, and Average measurements are correctly reported in units of "instructions" or "CPU clock cycles".

3. This page is best viewed with the MATLAB Help Browser, which allows the system names to link to the corresponding subsystems in the Simulink model.

HELP on Profiling with Embedded Target for TI C6000 DSP(tm)


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