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Code Verification using RTDX
by Kerry Schutz
Verify your DSP Implementation using RTDX and Simulink
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| profileReport_sa_gain_c6416.html |
Profile Report
Profile Report
Simulink model: sa_gain_c6416.mdl
Target: C6416DSK
Report of profile data from Code Composer Studio (tm)
13-Aug-2006 08:55:32
Timing constants
| Base sample time |
4 ms |
| CPU Clock speed1 |
720 MHz |
Profiled Simulink Subsystems
| System name |
sa_gain_c6416
|
| STS object |
stsSys1_OutputUpdate |
Max time spent in this subsystem per interrupt |
128.1 µs |
| Max percent of base interval |
3.2% |
| Number of iterations counted |
2161 |
| System name |
sa_gain_c6416/Gain Subsystem
|
| STS object |
stsSys0_OutputUpdate |
Max time spent in this subsystem per interrupt |
288.9 ns |
| Max percent of base interval |
0.00722% |
| Number of iterations counted |
2161 |
Notes
1. The CPU Clock Speed is assumed to be 720 MHz. If your board uses a different clock speed, then you must specify the new speed in RTW Options.
2. STS timing objects associated with subsystem profiling are configured for a host-side operation of 8*x, reflecting the numerical relationship between CPU clock cycles and high-resolution timer clicks. Therefore, STS Max, Total, and Average measurements are correctly reported in units of "instructions" or "CPU clock cycles".
3. This page is best viewed with the MATLAB Help Browser, which allows the system names to link to the corresponding subsystems in the Simulink model.
HELP on Profiling with Embedded Target for TI C6000 DSP(tm)
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