DSP Code Verification using UDP
by Kerry Schutz
18 Nov 2006
(Updated 20 Nov 2006)
No BSD License
How to verify the functionality of your DSP code via processor in-the-loop co-simulation using Simul
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| Description |
In this document I show how to verify the functionality of your DSP code via processor in-the-loop (PIL) co-simulation using Simulink?s UDP (user datagram protocol) blocks. These blocks are a new addition to the R2006b release of Simulink. This example is an extension of a previous example which was based on using Texas Instrument?s RTDX (real-time data exchange) instead of UDP. Conceptually you can replace the acronym ?RTDX? in that document with the acronym ?UDP? and you would have this document. In practical terms however there is more to it than just replacing RTDX blocks with UDP blocks and pressing build or play. Those differences are the motivation behind this document.
In this document I show how to use Simulink?s Target/Host UDP blocks to verify a simple fixed point design that uses frame-based processing. The target hardware is a C6416 DSK by Spectrum Digital with a DSK-91C111 D.SignT daughter card plugged into the External Peripheral Interface.
If you are not familiar with the concept of PIL and MBD (Model-based design) I suggest you read the document rtdx_intro.doc. It introduces MBD and PIL in the context of RTDX but the document is general enough that any communications protocol would apply. |
| Required Products |
Real-Time Workshop
Real-Time Workshop Embedded Coder
Signal Processing Blockset
Signal Processing Toolbox
Simulink
Simulink Fixed Point
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| MATLAB release |
MATLAB 7.3 (R2006b)
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Profile Report
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| Other Files |
udp/example_sel2html.m, udp/exsel_udp.txt, udp/gain/gain_6416_hst_udp.mdl, udp/gain/gain_6416_tgt_udp.mdl, udp/udp_exsel.txt, udp/README.DOC, udp/gain/gain_golden.mdl, udp/gain/gain_udp.doc, udp/gain/gain_float_minus_fixed.mdl
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