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Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL

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Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL

by

Ali Behboodian (view profile)

 

17 Sep 2007 (Updated )

Model-Based Design of a Sigma-Delta ADC, from behavioral model to VHDL code.

Sigma_Delta.zip
Sigma_Delta/bin2sbin.m
Sigma_Delta/elaborated_design.mdl
Sigma_Delta/elaborated_design_sfun.mexw32
Sigma_Delta/filter_design.m
Sigma_Delta/fixed_point.mdl
Sigma_Delta/fixed_point_sfun.mexw32
Sigma_Delta/generate_fir_lut.m
Sigma_Delta/high_level.mdl
Sigma_Delta/high_level_sfun.mexw32
Sigma_Delta/multi_stage.mat
Sigma_Delta/multi_stage.mdl
Sigma_Delta/multi_stage_fixed.mat
Sigma_Delta/multi_stage_sfun.mexw32
Sigma_Delta/one_stage.mat
Sigma_Delta/Readme.doc
Sigma_Delta/sigma_delta_control.m

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