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Video Surveillance System Design with Simulink® and Xilinx® FPGAs

03 Jun 2008 (Updated 10 Jun 2008)

Files for the joint MathWorks and Xilinx seminar: Video Surveillance System Design

File Information
Description	This zip file includes Simulink models and Xilinx files used in the joint MathWorks and Xilinx seminar: Video Surveillance System Design with Simulink® and Xilinx® FPGAs.
Required Products	Image Processing Toolbox Signal Processing Blockset Signal Processing Toolbox Simulink Video and Image Processing Blockset
MATLAB release	MATLAB 7.6 (R2008a)
Other requirements	The Simulink models for the video design section were created with MATLAB 7.6 (R2008a). The hardware implementation models were created with MATLAB 7.5 (R2007b).
Zip File Content
Other Files	seminar_designs/Simulink Section/BackgroundEst.mdl, seminar_designs/Simulink Section/OpticalFlow.mdl, seminar_designs/Simulink Section/ReadMe.txt, seminar_designs/Simulink Section/Simulink Video Sysdesign.ppt, seminar_designs/Xilinx Section/abstract model/vipabandonedobj_bayer_abstract.mdl, seminar_designs/Xilinx Section/embedded/Pre_SysGen_Post_embedded.mdl, seminar_designs/Xilinx Section/hw_cosim/init.m, seminar_designs/Xilinx Section/hw_cosim/netlist/ml506/vsk_camera_vop_cw.bit, seminar_designs/Xilinx Section/hw_cosim/netlist/ml506/vsk_camera_vop_cw_bd.bmm, seminar_designs/Xilinx Section/hw_cosim/netlist/ml506/vsk_camera_vop_hwcosim_lib.mdl, seminar_designs/Xilinx Section/hw_cosim/netlist/sp3dsp1800/vsk_camera_vop_cw.bit, seminar_designs/Xilinx Section/hw_cosim/netlist/sp3dsp1800/vsk_camera_vop_cw_bd.bmm, seminar_designs/Xilinx Section/hw_cosim/netlist/sp3dsp1800/vsk_camera_vop_hwcosim_lib.mdl, seminar_designs/Xilinx Section/hw_cosim/netlist/sp3dsp3400/vsk_camera_vop_cw.bit, seminar_designs/Xilinx Section/hw_cosim/netlist/sp3dsp3400/vsk_camera_vop_cw_bd.bmm, seminar_designs/Xilinx Section/hw_cosim/netlist/sp3dsp3400/vsk_camera_vop_hwcosim_lib.mdl, seminar_designs/Xilinx Section/hw_cosim/vipabandonedobj_bayer_1800_frames.mdl, seminar_designs/Xilinx Section/hw_cosim/vipabandonedobj_bayer_1800_noframes.mdl, seminar_designs/Xilinx Section/hw_cosim/vipabandonedobj_bayer_3400_frames.mdl, seminar_designs/Xilinx Section/hw_cosim/vipabandonedobj_bayer_ml506_frames.mdl, seminar_designs/Xilinx Section/hw_cosim_modified/init.m, seminar_designs/Xilinx Section/hw_cosim_modified/Pre_SysGen_Post_sh_fifo_nohwcs.mdl, seminar_designs/Xilinx Section/hw_cosim_modified/results.mat, seminar_designs/Xilinx Section/hw_cosim_modified/sources.mat, seminar_designs/Xilinx Section/hw_cosim_modified/vipabandonedobj_bayer_hwcs_noframes.mdl, seminar_designs/Xilinx Section/hw_cosim_modified/vipabandonedobj_bayer_hwcs_replaced_inputs.mdl, seminar_designs/Xilinx Section/hw_cosim_modified/vipabandonedobj_bayer_hwcs_replaced_inputs_outputs.mdl, seminar_designs/Xilinx Section/ReadMe.txt, seminar_designs/Xilinx Section/rgb2bayer.m, seminar_designs/Xilinx Section/sysgen_block/init.m, seminar_designs/Xilinx Section/sysgen_block/vipabandonedobj_bayer_sg.mdl, seminar_designs/Xilinx Section/xilinx_developing_videoapps-60min.ppt

Tags for This File
Everyone's Tags	fpga, generator, hdl, simulink, system, verilog(2), vhdl(2), video, vip
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Comments and Ratings (1)
14 Oct 2009	Eric Callagane	Really nice file! May be interesting for my customer http://www.securite-surveillance.com/

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Updates
	Updating the file content and text in the file exchange.
10 Jun 2008	Updating fields and Zip file with Xilinx's material.

Tag Activity for this File
Tag	Applied By	Date/Time
video	Alan Hwang	22 Oct 2008 10:04:40
fpga	Alan Hwang	22 Oct 2008 10:04:40
system	Alan Hwang	22 Oct 2008 10:04:40
generator	Alan Hwang	22 Oct 2008 10:04:40
hdl	Alan Hwang	22 Oct 2008 10:04:40
vip	Alan Hwang	22 Oct 2008 10:04:40
verilog	Alan Hwang	22 Oct 2008 10:04:40
simulink	Alan Hwang	22 Oct 2008 10:04:40
vhdl	Alan Hwang	22 Oct 2008 10:04:40
verilog	Dhruva	05 Mar 2009 23:44:06
vhdl	IVAN contreras	25 Apr 2009 01:29:56

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