The SIMULINK- models of multibit Delta-Sigma ADC and Delta-Sigma DAC all have a non-ideal D/A-converter.
The DAC mismatch noise will be shaped according to a general Data Weighted Averaging (DWA) transfer function 1±z^(-D), where D is a positive integer.
The DWA element selection logic calculates a selection vector. The selection vector chooses, which of the unit DACs will be used according to DAC input.
The DWA block is constructed using mainly fixed-point blocks.
Models for Incremental DWA (IDWA) were also added.
This package also includes a spurious tone estimator: the spurs can be estimated using the DS input signal and the DNL error shape.