INTERFACE BETWEEN MATLAB AND CADENCE FOR MACRO-MODEL EXTRACTION

launch cadence analog simulations from Matlab and extract a macromodel of linear analog functions
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Updated 13 May 2011

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In order to extract macromodels parameters, Cadence will be used as a schematic entry. The netlist will be used by the tool and simulations can be launched using the Ocean tool from cadence. By making DC, Parametric, and AC simulations, it is possible to extract a linear macromodel of the function (input and output impedance, transfer function) and even model the non linearities.

In a second part it is possible to make parametric simulation, i.e. change a variable in the schematic and plot all characteristics function of this variable.

With this methodology, it becomes possible to optimize, for example the sizes of the transistors, or current sources value easily.

Cite As

Philippe BENABES (2024). INTERFACE BETWEEN MATLAB AND CADENCE FOR MACRO-MODEL EXTRACTION (https://www.mathworks.com/matlabcentral/fileexchange/26525-interface-between-matlab-and-cadence-for-macro-model-extraction), MATLAB Central File Exchange. Retrieved .

MATLAB Release Compatibility
Created with R2010a
Compatible with any release
Platform Compatibility
Windows macOS Linux
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SIMECT3release/CADENCE_EXP/I_diff_TO_I_diff/Sim/variables/

SIMECT3release/CADENCE_EXP/I_uni_TO_V_diff/Sim/variables/

SIMECT3release/CADENCE_EXP/V_diff_TO_I_uni/Sim/variables/

SIMECT3release/CADENCE_EXP/V_uni_TO_V_uni/

SIMECT3release/CADENCE_EXP/V_uni_TO_V_uni/Sim/variables/

SIMECT3release/DOCUMENTATION/PDF_Sources/

SIMECT3release/SIMECT/

SIMECT3release/SIMECT/GUI_SIMECT/

SIMECT3release/SIMECT/SIMECT_APP/

SIMECT3release/SIMECT/SIMULINK/

SIMECT3release/SIMECT/VHDL/

Version Published Release Notes
1.5.0.0

correction for version 3.0 updated this morning

1.4.0.0

many codes habe been updated
possibility to generate verilog-A codes
parametric simulations included to the GUI
subcircuit extraction
compatible with AMS and ST design Kits
compatibility with cadence 6.1

1.3.0.0

In this new version, sources can be automatically added to extract the parameters.

1.2.0.0

The graphical interface has been improved. Now the tool produces simulink and VHDL-AMS models