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Highlights from
INTERFACE BETWEEN MATLAB AND CADENCE FOR MACRO-MODEL EXTRACTION

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from INTERFACE BETWEEN MATLAB AND CADENCE FOR MACRO-MODEL EXTRACTION by Philippe BENABES
launch cadence analog simulations from Matlab and extract a macromodel of linear analog functions

[]=write_verilog_real(fid,name,value) 
function []=write_verilog_real(fid,name,value)
% Write vhdl Constant vector from value and name

    fprintf(fid, 'parameter real %s = ', name);
    fprintf(fid, '%.6e;\n', value);

end

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