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Highlights from
INTERFACE BETWEEN MATLAB AND CADENCE FOR MACRO-MODEL EXTRACTION

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from INTERFACE BETWEEN MATLAB AND CADENCE FOR MACRO-MODEL EXTRACTION by Philippe BENABES
launch cadence analog simulations from Matlab and extract a macromodel of linear analog functions

[]=write_verilog_vector(fid,name,value) 
function []=write_verilog_vector(fid,name,value)
% Write vhdl Constant vector from value and name

rev_value=fliplr(value);
for k=1:length(rev_value)
    fprintf(fid, 'parameter real %s_%s  = %s ; \n', name,num2str(k),num2str(rev_value(k),'%.12e'));

    %Flip vectors as in VHDL-AMS the coefficients are from small to big

end

end

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