GPS Receiver using Xilinx FPGA and TI DSP

These model files move from a system level GPS receiver channel to actual operating hardware.

Description

This set of models elaborates a simple "system level" descrition of a GPS receiver channel all the way to operating hardware. Real world captured GPS signals are used to test the initial receiver design. Ultimatly, the design is elaborated to the point of being deployed on a Xilinx FPGA and TI DSP. NOTE: You do not have to have the tools to do this to use most of the models.

• Required Products: Communications Blockset; Communications System Toolbox; Simulink Coder; DSP System Toolbox; Signal Processing Toolbox; Simulink; Simulink Fixed Point; Stateflow; Stateflow Coder
• MATLAB release: MATLAB 7.9 (R2009b)
• Other requirements: To get to the full hardware implementation one needs: TI CCS, Xilinx System Generator, and the LyrTech Small Form Factor SDR package. But the file set is useful even without this.

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