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GPS Receiver using Xilinx FPGA and TI DSP

version 1.1.0.1 (3.08 MB) by

These model files move from a system level GPS receiver channel to actual operating hardware.

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This set of models elaborates a simple "system level" descrition of a GPS receiver channel all the way to operating hardware. Real world captured GPS signals are used to test the initial receiver design. Ultimatly, the design is elaborated to the point of being deployed on a Xilinx FPGA and TI DSP. NOTE: You do not have to have the tools to do this to use most of the models.

Comments and Ratings (6)

oh

oh (view profile)

guo yong

I also think that it would be excellent if it is documented.

Ali Alsaqqa

Would have been excellent if it is documented. Without documentation it is unfortunately useless.

ehs

ehs (view profile)

slava

slava (view profile)

Ammar

Ammar (view profile)

Updates

1.1.0.1

Updated license

1.1

Updated to work with r2009b through 2011a inclusive.

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