Search:
MATLAB Central
File Exchange
Answers
Newsgroup
Link Exchange
Blogs
Trendy
Cody
Contest
MathWorks.com
Create Account
Log In
File Exchange
Answers
Newsgroup
Link Exchange
Blogs
Trendy
Cody
Contest
MathWorks.com
Files
Categories
Authors
Tags
Comments
Submit a File
About File Exchange
Rank: 58146
based on
0 downloads (last 30 days)
and
0 file submitted
Rakesh
E-mail
av.rakeshkumar@gmail.com
Personal Profile:
Professional Interests:
Watch this Author's files
Files
Watch Lists
Top Tags Applied by Rakesh
1 - 1 of
1
verilog
Files Tagged by Rakesh
1 - 1 of
1
Updated
File
Tags
Downloads
(last 30 days)
Comments
Rating
01 Oct 2007
Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL
Model-Based Design of a Sigma-Delta ADC, from behavioral model to VHDL code.
Author:
Ali Behboodian
adc
,
sigmadelta
,
vhdl
,
verilog
,
multirate
,
dsp
53
20
4.08
4.1
|
25 ratings
Currently Watching
Type
Description
File
Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL
Files Matching Rakesh's Watch List
1 - 1 of
1
Updated
File
Tags
Downloads
(last 30 days)
Comments
Rating
01 Oct 2007
Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL
Model-Based Design of a Sigma-Delta ADC, from behavioral model to VHDL code.
Author:
Ali Behboodian
adc
,
sigmadelta
,
vhdl
,
verilog
,
multirate
,
dsp
53
20
4.08
4.1
|
25 ratings
Comments and Ratings Matching Rakesh's Watch List
1-5 of
32
Date
File
Comment by
Comments
Rating
02 Nov 2012
Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL
Model-Based Design of a Sigma-Delta ADC, from behavioral model to VHDL code.
hou
I need it
4
17 May 2011
Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL
Model-Based Design of a Sigma-Delta ADC, from behavioral model to VHDL code.
xiao qian
error:Object parameter contains an invalid handle. why? confused
Comment only
11 Nov 2009
Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL
Model-Based Design of a Sigma-Delta ADC, from behavioral model to VHDL code.
Ashwini
4
09 Feb 2009
Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL
Model-Based Design of a Sigma-Delta ADC, from behavioral model to VHDL code.
Vinay Goli
5
16 Sep 2008
Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL
Model-Based Design of a Sigma-Delta ADC, from behavioral model to VHDL code.
selvakumar surulisubbu
4
Contact us
Comment only