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Rajiv Ghosh-Roy

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17 Dec 2009 Screenshot Disabling SMIs on Intel(R) ICH5 chipsets Avoid CPU overloads with xPC Target(TM) on Intel(R) chipsets by disabling SMIs Author: Rajiv Ghosh-Roy drivers, real time, xpc target, smi, cpuoverload 13 8
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04 Dec 2014 Disabling SMIs on Intel(R) ICH5 chipsets Avoid CPU overloads with xPC Target(TM) on Intel(R) chipsets by disabling SMIs Author: Rajiv Ghosh-Roy Marco

0x2810 for ICH8, ICH8R South Bridge.

26 Apr 2013 Disabling SMIs on Intel(R) ICH5 chipsets Avoid CPU overloads with xPC Target(TM) on Intel(R) chipsets by disabling SMIs Author: Rajiv Ghosh-Roy Kosuke

02 Mar 2012 Disabling SMIs on Intel(R) ICH5 chipsets Avoid CPU overloads with xPC Target(TM) on Intel(R) chipsets by disabling SMIs Author: Rajiv Ghosh-Roy Jing Huang

Sometimes, users get an error message "Intel chipset not found" when using the disable SMI block. What you can do is to add the chipset of your target machine into the ich5.c. Here is how to do it.

1. Open the ich.5, find the IntelChipSets table, which looks like
IntelChipSets[] =
{
{0x2410, "82801AA_0"},
{0x2420, "82801AB_0"},
…… ……
The first field is the device ID, the second field is the name of the Southbridge chip. The name is not used by the code at all.

2. Find the device ID of the chipset in your target machine. Boot up the xpc target machine, on the Matlab command window, issue “xpctargetping, tg = xpc, getxpcpci(‘all’)”, you should see things like
>> getxpcpci('all')

List of installed PCI devices:

Intel *****
Bus 0, Slot 0, IRQ 0
Host Bridge
VendorID 0x8086, DeviceID 0x29e0, SubVendorID 0x103c, SubDeviceID 0x1308
Intel *****
Bus 0, Slot 31, IRQ 0
ISA Bridge
VendorID 0x8086, DeviceID 0x2916, SubVendorID 0x103c, SubDeviceID 0x1308
The ISA Bridge is what you want to add to the IntelChipSets table

3. Add the device ID into the IntelChipSets table. For the above example, add
{0x2916, “Whatever you name it”},
to the IntelChipSets table.

4. Issue “mex ich5.c” from matlab, and then rebuild your model.

Note: this change may not work on every chipset because the relevant registers might not at the same address.

10 May 2011 Disabling SMIs on Intel(R) ICH5 chipsets Avoid CPU overloads with xPC Target(TM) on Intel(R) chipsets by disabling SMIs Author: Rajiv Ghosh-Roy Chris

Added {0x2914, "ICH9D0"} and my SMI problems disappeared. The module also appears to prevent long TETs arising from enabled USB support (useful if one also uses the target machine for Windows and/or has a motherboard lacking PS/2 support).

03 Dec 2010 Disabling SMIs on Intel(R) ICH5 chipsets Avoid CPU overloads with xPC Target(TM) on Intel(R) chipsets by disabling SMIs Author: Rajiv Ghosh-Roy Michael

This S-function worked for a Core 2 Duo (ICH7). I also have a Core i7 and a Xeon machine that both seem to be suffering from the same CPU Overload problems. I added the Device ID for the ISA Bridge (under PCI devices in xpcexplr) to the S-fuction code since that seemed to be what was done to add support for the other chipsets. For both the Xeon and Core i7, it seems to find the chipset, but gives me the following error: "Failed to Clear GBL_SMI_EN bit; SMI_LOCK may be set" Any suggestions?

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