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updated 4 years ago

EZ Video Component Builder for Altera Avalon Streaming by Atsushi Matsumoto

Sample models to create Altera Avalon Streaming Components with Simulink HDL Coder. (fpga, vhdl, verilog)

Block-to-Code Highlighting Message

Code Generation Report for avalon_st_edge

Code Generation Report for avalon_st_edge

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updated 7 years ago

Phase Locked Loop tutorial by Giorgia Zucchelli

A tutorial showing how Phase-Locked Loops, both analog and digital can be efficiently modeling in Si (dsp, pll vco nco phase loc...)

Demo: Phase Locked Loop

cppll

dpll

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