HDL Verifier Support Package for Altera FPGA Boards by MathWorks HDLVerifier Team

HDL Verifier Support Package installer file that works with Support package installer (fpga design, altera, communications)

HDL Verifier Support Package for Xilinx FPGA Boards by MathWorks HDLVerifier Team

HDL Verifier Support Package installer file that works with Support package installer (aerospace, communications, control design)

SCOPE: interactively tabulate SEER excel variables by Rex Cheung

This takes SEER excel column data interactively, tabulate them, write back in table format. (data import, data export, optimization)

output=xls2tabulate2xls(xlsfilename)

short time fourier transform by Yella

I have written the basic code of STFT. (short time fourier tr..., communications, signal processing)

stft.m

Compare with hand coding and auto code generation of HDL by Akemi

You can confirm difference betwwen hand writing code and auto generation code. (aerospace, automotive, communications)

CommSys_DS_MS_cntl

CommSys_DS_cntl

FRAME_SYNC_cntl