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updated 3 years ago

HDL Coder Compatible edge detector by Igal

Simulink HDL Coder compatible negative and positive edge detectors. (hdl, edge, verilog)

edge_detector_1D

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updated 3 years ago

HDL coder compatible 1D Positive and Negative edge detectors by Igal

The default 1D Simulink edge detector is not HDl Coder compatible, so here's an alternative. (edge, logic, hdl coder)

edge_detector_1D

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updated almost 4 years ago

EZ Video Component Builder for Altera Avalon Streaming by Atsushi Matsumoto

Sample models to create Altera Avalon Streaming Components with Simulink HDL Coder. (fpga, vhdl, verilog)

Block-to-Code Highlighting Message

Code Generation Report for avalon_st_edge

Code Generation Report for avalon_st_edge

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updated almost 4 years ago

CORDIC atan calculation by Atsushi Matsumoto

CORDIC arctangent(atan) Simulink model. You can generate HDL from this model. (cordic, atan, arc)

cordic_atan_iterative_fxpt

cordic_atan_serial_fxpt

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updated almost 5 years ago

XILINXBRAM - Xilinx FPGA Block RAM Init by Stepan Matejka

Matlab code for Xilinx FPGA (Spartan, Virtex) 18k block RAM declaration using VHDL or Verilog (data export, xilinx, block ram)

xilinxbram(filename, dataary, bitsperitem, archname, prim...

xilinxbraminit

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updated 5 years ago

Matlab Link to Quartus II by Sreeram Mohan

Uses Tcl script utility of the quartus II EDA tool to automate the design flow from a matlab GUI (altera quartus ii, matlab link to quartu..., matlab link to altera)

main_gui(varargin)

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updated 6 years ago

Video Surveillance System Design with Simulink® and Xilinx® FPGAs by Alan Hwang

Files for the joint MathWorks and Xilinx seminar: Video Surveillance System Design (video, fpga, system)

rgb2bayer(filename, sensoralign)

init.m

init.m

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updated 7 years ago

Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL by Ali Behboodian

Model-Based Design of a Sigma-Delta ADC, from behavioral model to VHDL code. (dsp, adc, sigmadelta)

sigma_delta_control

y=bin2sbin(x)

filter_design.m

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updated almost 9 years ago

Model-Based Design and FPGA Implementation with Simulink by Ali Behboodian

We introduce Simulink® for Model-Based Design in the context of FPGA implementation and verificatio (hardware targets, fpga, vhdl)

edgecmds

edgecmds_v

example_sel2html(fn)

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