Video Surveillance System Design with Simulink® and Xilinx® FPGAs by Alan Hwang

Files for the joint MathWorks and Xilinx seminar: Video Surveillance System Design (hdl, verilog, vhdl)

rgb2bayer(filename, sensoralign)

init.m

init.m

Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL by Ali Behboodian

Model-Based Design of a Sigma-Delta ADC, from behavioral model to VHDL code. (adc, sigmadelta, vhdl)

sigma_delta_control

y=bin2sbin(x)

filter_design.m