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Date: Updated   Submitted
Time Frame: All Time   Last 30 Days   Last 7 Days
Date Link Tags Clicks Descriptions Ratings
30 Oct 2012 Accelerating SERDES Simulation

Using a Simulink model, designers quickly evaluate design alternatives and reduce simulation time.

Contributed by: Linda Webb
analog simu..., backplane data, behavioral..., filter design, serdes 102 1
4 Jun 2013 Beschleunigung von SERDES-Simulationen

German translation of the article: Accelerating SERDES Simulation

Contributed by: Linda Webb
analog simu..., backplane data, behavioral..., filter design, serdes 19 1
31 May 2013 Designing a Novel ADC Architecture with Feedback and Noise Shaping

TI engineers designed an ADC that uses noise shaping to reduce chip area and power consumption.

Contributed by: Linda Webb
adc, analog-to-d..., dac, error feedback, fir filtering 38 1

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