A Next-Generation Workflow for System-Level Design of Mixed-Signal Integrated Circuits

First submitted by Linda Webb on 15 Mar 2013

Semiconductor Technology Academic Research Center halved design time and eliminated costly respins.

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Date	Contributor	Description	Rating
15 Mar 2013	Linda Webb	By Kunihiko Tsuboi and Nobutaka Okumura, STARC With system-level design the Semiconductor Technology Academic Research Center (STARC) halved design time and eliminated costly respins.

15 Mar 2013

Linda Webb

By Kunihiko Tsuboi and Nobutaka Okumura, STARC

With system-level design the Semiconductor Technology Academic Research Center (STARC) halved design time and eliminated costly respins.

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Tag	Applied By	Date/Time
simulation	aut	16 Mar 2013 at 11:09am
sigma-delta analog-to-digital converter	Linda Webb	15 Mar 2013 at 3:25pm
circuit-level design	Linda Webb	15 Mar 2013 at 3:25pm
adc	Linda Webb	15 Mar 2013 at 3:25pm
starc	Linda Webb	15 Mar 2013 at 3:25pm
starcad-ams	Linda Webb	15 Mar 2013 at 3:25pm
mixed-signal integrated circuit	Linda Webb	15 Mar 2013 at 3:25pm
system-level design	Linda Webb	15 Mar 2013 at 3:25pm
simulation	Linda Webb	15 Mar 2013 at 3:25pm