Communications System Toolbox

Implementing a Communications System

Fixed-Point Modeling

Many communications systems use hardware that requires a fixed-point representation of your design. Communications System Toolbox supports fixed-point modeling in all relevant blocks and System objects™ with tools that help you configure fixed-point attributes.

Fixed-point support in the system toolbox includes:

• Word sizes from 1 to 128 bits
• Arbitrary binary-point placement
• Overflow handling methods (wrap or saturation)
• Rounding methods: ceiling, convergent, floor, nearest, round, simplest, and zero

Fixed-Point Tool in Simulink Fixed Point™ facilitates the conversion of floating-point data types to fixed point. For configuration of fixed-point properties, the tool tracks overflows and maxima and minima.

Code Generation

Once you have developed your algorithm or communications system, you can automatically generate C code from it for verification, rapid prototyping, and implementation. Most System objects, functions, and blocks in Communications System Toolbox can generate ANSI/ISO C code using MATLAB Coder™, Simulink Coder™, or Embedded Coder™. A subset of System objects and Simulink blocks can also generate HDL code.

To leverage existing intellectual property, you can select optimizations for specific processor architectures and integrate legacy C code with the generated code. You can also generate C code for both floating-point and fixed-point data types.

DSP Prototyping

DSPs are used in communication system implementation for verification, rapid prototyping, or final hardware implementation. Using the processor-in-the-loop (PIL) simulation capability found in Embedded Coder, you can verify generated source code and compiled code by running your algorithm’s implementation code on a target processor.

FPGA Prototyping

FPGAs are used in communication systems for implementing high-speed signal processing algorithms. Using the FPGA-in-the-loop (FIL) capability found in HDL Verifier™, you can test RTL code in real hardware for any existing HDL code, either manually written or automatically generated HDL code.